Name:
Section:
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Homework Set 3
©D. J. Brown & C. N. Hadjicostis
Due Wednesday, February 7, 2007 at 3pm
You are required to complete the assignment on these sheets.
If you need extra space, make a note and
continue your work on the back.
If you need more space, include an extra sheet of paper.
For full credit,
you must staple the assignment.
Problem 3.0
Do Week #3 Mallard lessons and webquizzes by 3 pm Tuesday, February 6, 2007.
Problem 3.1
Consider a network N which receives as input an 8bit even parity ASCII encoding a
7
a
6
a
5
a
4
a
3
a
2
a
1
a
0
. The
leftmost bit (a
7
) corresponds to an even parity bit; i.e., a
7
is chosen such that the total number of 1's in
a
7
a
6
a
5
a
4
a
3
a
2
a
1
a
0
is even.
The remaining seven bits a
6
a
5
a
4
a
3
a
2
a
1
a
0
correspond to the ASCII encoding of a
symbol.
Note:
You may use any types of gates you wish: AND, OR, NOT, NAND, NOR, XOR. More than
two inputs are permitted to AND, OR, NAND and NOR gates. However, XOR gates are restricted to two
inputs.
a. Draw a circuit to compute p, where p = 1 if and only if an error is detected. (For example, if
01101110 is received, then p = 1 because the total number of 1's is odd, thus indicating an error.
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 Spring '08
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 Binarycoded decimal, Boolean function, correct excess3 sum

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