hwk05_s07 - penalty if not stapled Name: Section: Score:...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
Name: Section: Score: Homework Set 5 Due Wednesday, February 21, 2007 at 3pm Exam #1 Tuesday, February 27 7:00-8:15pm If you have a legitimate conflict with the exam time you must send email to Prof. Hadjicostis (chadjic@uiuc.edu) by Monday, February 19 at the latest , providing the following information: 1) Your name, netID, and section 2) Precise details of the conflict e.g., physics 112 lab, section X3, 7-9 pm; 3) Your availability that evening (both before and after exam time), e.g., 5:30-10:00 pm Label MSI Components Carefully This assignment focuses on logic design using MSI (Medium-Scale Integration) components such as multiplexers, demultiplexers, encoders, and decoders. For each MSI component used in your designs, you must be careful to label all inputs and outputs (e.g. 3:8 decoder must have select lines s 2 s 1 s 0 and output lines l 7 l 6 …l 0 labeled) as well as the MSI components themselves (e.g. for a 3:8 decoder, the words “3:8 DEC” must appear on the “box”). Points
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 6

hwk05_s07 - penalty if not stapled Name: Section: Score:...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online