Registers - Mallard ECE 290: Computer Engineering I -...

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Mallard ECE 290: Computer Engineering I - Spring 2007 - Graded Web. .. file:///C:/Documents%20and%20Settings/Al/Desktop/Mallard_HW_8/Re. .. 1 of 2 3/13/2007 1:07 AM Graded WebQuiz: Registers You have submitted this WebQuiz 1 time (including this time). You may submit this WebQuiz a total of 10 times and receive full credit. Note: The figure in the first question should show the FA sum output feeding back to the X register serial input. Question #1 The serial adder shown to the left uses two 4-bit right shift registers X and Y, which provide the a and b Full Adder (FA) inputs. The FA sum feeds into the serial input of X, thereby shifting the sum back into X, one bit at a time. There is a D flip-flop whose output provides the carry-in for the next pair of bits to be added; each carry-out of the FA is transferred into the D flip-flop (one per clock cycle). Assume that the carry flip-flop is initialized to 0 and that register X initially contains 0101 and register Y contains 0011. What is the content of register X after each of 4 shifts? (E.g., 0101, 1101, 1011, 1000)
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This note was uploaded on 06/21/2011 for the course ECE 290 taught by Professor Staff during the Spring '08 term at University of Illinois, Urbana Champaign.

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Registers - Mallard ECE 290: Computer Engineering I -...

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