7064_pin_definitions

7064_pin_definitions - University of Florida Department of Electrical Computer Engineering EEL 3701 Revision 0 Dr Eric M Schwartz 2-Mar-10 Page 1/3

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
University of Florida EEL 3701 Dr. Eric M. Schwartz Department of Electrical & Computer Engineering Revision 0 2-Mar-10 Page 1/3 UF-3701 CPLD Board Information (Altera 7064 PLCC CPLD Information) Table 1 : Pinouts for Altera’s EPM7064SLC44 CPLD. CPLD Pin Purpose 1 Input/GCLRn 2 Input/OE2/GCLK2 3V C C 4 General I/O 5 General I/O 6 General I/O 7 TDI (prog) 8 General I/O 9 General I/O 10 GND 11 General I/O 12 General I/O 13 TMS (prog) 14 General I/O 15 VCC 16 General I/O 17 General I/O 18 General I/O 19 General I/O 20 General I/O 21 General I/O 22 GND 23 VCC 24 General I/O 25 General I/O 26 General I/O 27 General I/O 28 General I/O 29 General I/O 30 GND 31 General I/O 32 TCK (Prog) 33 General I/O 34 General I/O 35 VCC 36 General I/O 37 General I/O 38 TDO (Prog) 39 General I/O 40 General I/O 41 General I/O 42 GND 43 Input/GCLK1 44 Input/OE1 Table 2 : Pinouts by function for Altera’s EPM7064SLC44 CPLD. Note that the pins in ( ) are for the JTAG programming and should be avoided, if possible. CPLD Pin(s) Function(s) 1 (avoid using) Input, Global Clear 43 Input, Global Clock 1 2 (avoid using) Input, OE2, Global Clock 2 (alt to pin 43) 44 (avoid using) Input, OE1 7,13,32,38 (do not use) JTAG programming interface 10,22,30,42 Ground (GND) 3,15,23,35 +5V (VCC) 4,5,6,(7),8,9,11,12 Logic Array Block A I/O (13),14,16,17,18,19,20,21 Logic Array Block B I/O 24,25,26,27,28,29,31,(32) Logic Array Block C I/O 33,34,36,37,(38),39,40,41 Logic Array Block D I/O The UF-3701 CPLD Board contains an Altera 7064 CPLD (EPM7064SLC44-10). This is a programmable 44-pin device in a PLCC package. The -10 at the end indicates that the device has a propagation delay of 10ns. This CPLD board can be plugged into your protoboard for programming and for a use as complex logic circuits.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 07/08/2011 for the course EEL 3701 taught by Professor Lam during the Spring '08 term at University of Florida.

Page1 / 3

7064_pin_definitions - University of Florida Department of Electrical Computer Engineering EEL 3701 Revision 0 Dr Eric M Schwartz 2-Mar-10 Page 1/3

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online