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Unformatted text preview: Click to edit Master subtitle style Introduction © Dr. Ayman Abdel-Hamid, Introduction 11 © Dr. Ayman Abdel-Hamid, Distributed Systems Dr. Ayman Abdel-Hamid College of Computing and Information Technology Arab Academy for Science, Technology, and Maritime Transport Chapter 1 – Introduction (Cont.) With minor additives by Dr. Ahmed Abou El Farag Introduction © Dr. Ayman Abdel-Hamid, Introduction 22 © Dr. Ayman Abdel-Hamid, Pitfalls when Developing Distributed Systems False assumptions made by first time developer: • The network is reliable. • The network is secure. • The network is homogeneous. • The topology does not change. • Latency is zero. • Bandwidth is infinite. • Transport cost is zero. • There is one administrator. 7/7/11 33 Design Requirements • Performance issues – responsiveness – throughput – load sharing, load balancing – algorithm , behavior • Quality of service – correctness (in nondeterministic environments) – reliability, availability, fault tolerance – security – performance – adaptability Introduction © Dr. Ayman Abdel-Hamid, Introduction 44 © Dr. Ayman Abdel-Hamid, Hardware Concepts 1.6 Multiprocessor versus Multicomputer Introduction © Dr. Ayman Abdel-Hamid, 55 Hardware Considerations § General Classification: – Multiprocessor – a single address space among the processors – Multicomputer – each machine has its own private memory. § OS can be developed for either type of environment. Introduction © Dr. Ayman Abdel-Hamid, 66 Parallel Computer Memory § Shared Memory Architecture – All processors access all memory as a single global address space. – Data sharing is fast. – Lack of scalability between memory and CPUs Introduction © Dr. Ayman Abdel-Hamid, 77 Parallel Computer Memory § Distributed Memory Architecture – Each processor has its own memory. – Is scalable, no overhead for cache coherency. – Programmer is responsible for many details of communication between processors. Introduction © Dr. Ayman Abdel-Hamid, Introduction 88 © Dr. Ayman Abdel-Hamid, Multiprocessors 1/2 A bus-based multiprocessor Cache coherency problems 1.7 Introduction © Dr. Ayman Abdel-Hamid, Introduction 99 © Dr. Ayman Abdel-Hamid, Multiprocessors 2/2 a) A crossbar switch b) An omega switching network 1.8 Introduction © Dr. Ayman Abdel-Hamid, Multiprocessor Organizations § Uniform Memory Access [UMA] – Caching is vital for reasonable performance (e.g., caches on a shared memory multiprocessor). – Want to maintain cache coherency • Write-through cache : any changes to cache are written through to memory. § Non-Uniform Memory Access [NUMA] – A hierarchy where CPUs have their own memory – Access costs to memory is non-uniform....
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