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gcpu_files_bw - University of Florida Department of...

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University of Florida EEL 3701 Drs. Gugel and Schwartz Department of Electrical & Computer Engineering Revision 0 8-Mar-10 Page 1/1 G-CPU Block Diagram P rogram C ounter (H/L) Bi-directional Data Bus 8 IR_LD CLK Controller IR5:0 CLK PC_INC PC_LD (U/L) Z Flag MAR_INC MAR_LD (U/L) N Flag X_INC X_LD (U/L) Y_INC Y_LD (U/L) IR_LD R/-W ADDR_SEL1:0 XD_LD YD_LD 6 6 MUXA MUXB ALU Z Flag N Flag MUXC MSA1:0 MSB1:0 MSC3:0 CLK 8 R/-W 8 IR5:0 Register R/-W Address Bus Mux 0 1 2 3 S1 S0 16 A15:0 ADDR_SEL1:0 M em A ddr R eg (H/L) X Reg Block Y Reg Block Note: PC, MAR, X, Y outputs are 16 bits X Reg Block = X displacement Reg + X Reg (H/L) Y Reg Block = Y displacement Reg + Y Reg (H/L) (Reset not shown due to space constraints) 8 8 1
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University of Florida EEL 3701 Drs. Gugel and Schwartz Department of Electrical & Computer Engineering Revision 0 8-Mar-10 Page 1/2 G-CPU Instruction Set Data Movement Instructions: Machine Codes (hex) Instruction Operand Description # of States 00 TAB none Transfer A to B (inherent addressing) 2 01 TBA none Transfer B to A (inherent addressing) 2 02 mm LDAA #data 8-bit data Load A with immediate data (immediate addr.) 3 03 mm LDAB #data 8-bit data Load B with immediate data (immediate addr.) 3 04 ll hh LDAA addr 16-bit address Load A with data from memory location addr (extended addressing) 5 05 ll hh LDAB addr 16-bit address Load B with data from memory location addr (extended addressing) 5 06 ll hh STAA addr 16-bit address Store data in A to memory location addr (extended addressing) 5 07 ll hh STAB addr 16-bit address Store data in B to memory location addr (extended addressing) 5 08 ii jj LDX #data 16-bit data Load X with immediate data (immediate addr.) 4 09 ii jj LDY #data 16-bit data Load Y with immediate data (immediate addr.) 4 0A ll hh LDX addr 16-bit addr Load X with data from memory location addr. (extended addressing) 6 0B ll hh LDY addr 16-bit addr Load Y with data from memory location addr. (extended addressing) 6 0C dd LDAA dd,X 8-bit displacement Load A with data from memory location pointed to by X + dd (indexed addressing) 4 0D dd LDAA dd,Y 8-bit displacement Load A with data from memory location pointed to by Y + dd (indexed addressing) 4 0E dd LDAB dd,X 8-bit displacement Load B with data from memory location pointed to by X + dd (indexed addressing) 4 0F dd LDAB dd,Y 8-bit displacement Load B with data from memory location pointed to by Y + dd (indexed addressing) 4 10 dd STAA dd,X 8-bit displacement Store data in A to memory location pointed to by X + dd (indexed addressing) 4 11 dd STAA dd,Y 8-bit displacement Store data in A to memory location pointed to by Y + dd (indexed addressing) 4 12 dd STAB dd,X 8-bit displacement Store data in B to memory location pointed to by X + dd (indexed addressing) 4 13 dd STAB dd,Y 8-bit displacement Store data in B to memory location pointed to by Y + dd (indexed addressing) 4 University of Florida EEL 3701 Drs. Gugel and Schwartz Department of Electrical & Computer Engineering Revision 0 8-Mar-10 Page 2/2 G-CPU Instruction Set ALU Related Instructions: Machine Codes (hex) Instruction Operand Description # of States 14 SUM_BA none
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