lab7_s11_oc_sound - University of Florida Electrical and...

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University of Florida EEL 4744 – Spring 2011 Dr. Eric M. Schwartz Electrical and Computer Engineering Dept. Matthew Emigh, TA Page 1/3 Revision 4 10-Apr-11 Lab 7: Output Timing, and Making Music! OBJECTIVES To understand and experiment with a microprocessor ePWM system to generate required digital waveforms. (We’ll use the ePWM system to make music!) REQUIRED MATERIALS 1 - Keypad circuits (from previous lab) or second USB cable for serial connection (from previous lab) 1 - LCD circuits (from previous lab) 1 - Piezo Speaker (Radio Shack part number 273-073 for $2) or cheap 8 speaker 1 - NE5532N Opamp You WILL need the following documentation: o Enhanced Pulse Width Modulator (ePWM) Module (OC) Reference Guide (SPRUG04A) o TMS320F28335 Data Manual (SPRS439H): Sections 4.3 o Spec sheet on 5532 Op Amp PART 1 – TIMER OUTPUT COMPARE The DSP has six enhanced pulse-width modulation (ePWM) modules, each supporting two PWM outputs. Pulse-width modulation is a method of producing arbitrary signal waveforms by varying the duty cycle of a switching device. If this explanation doesn’t make sense to you, don’t worry; we will be using the ePWM module for something much simpler: output compare. If you are interested in learning more about pulse-width modulation a short introductory video can be found here: http://www.youtube.com/watch?v=YmPziPfaByw . More resources can be found on the web. The DSP ePWM peripheral manual can be found on the class website. Each ePWM module is comprised of several submodules. We are interested in the Time Base (TB), Counter Compare (CC), Action Qualifier (AQ), and Event Trigger and Interrupt (ET) submodules. The Time Base submodule consists of a counter (TBCTR) that can be configured to count up, count down, or count up and then down. By default, the counter increments or decrements at the same frequency as the external clock (7.5 Mhz or every ~133 ns). This frequency can be decreased by setting a frequency divider in the TBCTL register. The increment/decrement frequency can be divided by up to 1792. The total period of the counter can be set in the 16-bit TBPRD register. Whenever the counter reaches the value of the TBPRD register, the counter either resets or begins counting down. The Counter Compare submodule consists of two 16-bit registers, named CMPA and CMPB, which can be set to any value. The values of these registers are continuously compared with the value of the time base counter. Either or both of these registers can trigger an event when the value of the respective register matches the value of the time base counter. The Action Qualifier submodule controls the level of the
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lab7_s11_oc_sound - University of Florida Electrical and...

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