RH_PLL_ASM - ; ;-- ;HERNANDEZ,RAFAEL R ;****************...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
;Hello Dr. Gugel ; ;I figured out why my program was working with the 150Mhz clock and ;how to set the board to run at that speed in assembly. ; ;When the code is written in C the Inisysctrl() function access the ;DSP2833x_Examples.h. This header file sets the DSP28_DIVSEL to 2 ;and the DSP2_PLLCR to A which makes the SYSCLKOUT = 150MHZ/2. The ;header file also allows me to uncomment some other lines to work ;with a different frequency. ; ;TI Documentation: ;Pg 50 of DSP Registers & PIE Interrupt Controller shows the ;required steps to change the PLLCR register. ;Pg 51 shows the values that the PLLCR register can have. They go ;from 0-A. If an A is written to this register the SYSCLKOUT would ;be equal to (OSCCLK*10)/2 if the PLLSTS[DIVSEL]bit = 2.
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: ; ;-- ;HERNANDEZ,RAFAEL R ;**************** PLL Modifying Code ******************************* ;ARO = PLLSTS (0x7011), AR1 = PLLCR (0x7021) ; PLL: MOV AR0,#PLLSTS top3 TBIT *AR0,#6 ;check if PLLSTS[MCLKSTS] =1 B top3, TC ;if equal to 1 branch MOV AH,*AR0 LSR AH,#7 AND AH,#0x0003 CMP AH,#0x0002 ;check if PLLSTS[DIVSEL]= 2 or 3 B loop, EQ ;if equal to 2 branch CMP AH,#0x0003 B loop, EQ ;if equal to 3 branch top1 TSET *AR0,#6 ;set PLLSTS[MCLKOFF] = 1 MOV AR1,#PLLCR MOV AH,#0xA ;(OSCCLK*10)/2 MOV *AR1,AH top2 TBIT *AR0,#0 ;check PLLSTS[PLLSTS] = 1 B top2, NTC ; if equal to zero branch TCLR *AR0,#6 ;set PLL[MCLKOFF] = 0 OR *AR0,#0x0100 ;PLLSTS[DIVSEL] = 2 LRET loop TCLR *AR0,#7 ;clear bit 8 of DIVSEL TCLR *AR0,#8 ;clear bit 7 of DIVSEL B top1,UNC...
View Full Document

This document was uploaded on 07/11/2011.

Ask a homework question - tutors are online