sprs439h - TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234 TMS320F28232 Digital Signal Controllers(DSCs Data Manual PRODUCTION DATA

sprs439h - TMS320F28335 TMS320F28334 TMS320F28332...

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TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 Digital Signal Controllers (DSCs) Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Literature Number: SPRS439H June 2007–Revised March 2010
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TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 SPRS439H–JUNE 2007–REVISED MARCH 2010 Contents 1 TMS320F2833x, TMS320F2823x DSCs .................................................................................. 11 1.1 Features .................................................................................................................... 11 1.2 Getting Started ............................................................................................................. 12 2 Introduction ...................................................................................................................... 13 2.1 Pin Assignments ........................................................................................................... 15 2.2 Signal Descriptions ........................................................................................................ 24 3 Functional Overview .......................................................................................................... 34 3.1 Memory Maps .............................................................................................................. 35 3.2 Brief Descriptions .......................................................................................................... 42 3.2.1 C28x CPU ....................................................................................................... 42 3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 42 3.2.3 Peripheral Bus .................................................................................................. 42 3.2.4 Real-Time JTAG and Analysis ................................................................................ 43 3.2.5 External Interface (XINTF) .................................................................................... 43 3.2.6 Flash ............................................................................................................. 43 3.2.7 M0, M1 SARAMs ............................................................................................... 43 3.2.8 L0, L1, L2, L3, L4, L5, L6, L7 SARAMs ..................................................................... 44 3.2.9 Boot ROM ....................................................................................................... 44 3.2.10 Security .......................................................................................................... 44 3.2.11 Peripheral Interrupt Expansion (PIE) Block ................................................................. 46 3.2.12 External Interrupts (XINT1–XINT7, XNMI) .................................................................. 46 3.2.13 Oscillator and PLL .............................................................................................. 46 3.2.14 Watchdog ........................................................................................................ 46 3.2.15 Peripheral Clocking ............................................................................................. 46 3.2.16 Low-Power Modes .............................................................................................. 46 3.2.17 Peripheral Frames 0, 1, 2, 3 (PFn) ........................................................................... 47 3.2.18 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 47 3.2.19 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 47 3.2.20 Control Peripherals ............................................................................................. 48 3.2.21 Serial Port Peripherals ......................................................................................... 48 3.3 Register Map ............................................................................................................... 49 3.4 Device Emulation Registers .............................................................................................. 51 3.5 Interrupts .................................................................................................................... 52 3.5.1 External Interrupts .............................................................................................. 56 3.6 System Control ............................................................................................................ 57 3.6.1 OSC and PLL Block ............................................................................................ 58 3.6.1.1 External Reference Oscillator Clock Option .................................................... 59 3.6.1.2 PLL-Based Clock Module ......................................................................... 60 3.6.1.3 Loss of Input Clock ................................................................................ 61 3.6.2 Watchdog Block ................................................................................................. 62 3.7 Low-Power Modes Block ................................................................................................. 63 4 Peripherals ....................................................................................................................... 64 4.1 DMA Overview ............................................................................................................. 64 4.2 32-Bit CPU-Timers 0/1/2 ................................................................................................. 66 4.3 Enhanced PWM Modules (ePWM1/2/3/4/5/6 ) ........................................................................ 68 2 Contents Copyright © 2007–2010, Texas Instruments Incorporated
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TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 SPRS439H–JUNE 2007–REVISED MARCH 2010 4.4 High-Resolution PWM (HRPWM) ....................................................................................... 72 4.5 Enhanced CAP Modules (eCAP1/2/3/4/5/6) ........................................................................... 73 4.6 Enhanced QEP Modules (eQEP1/2 ) ................................................................................... 75 4.7 Analog-to-Digital Converter (ADC) Module ............................................................................ 77 4.7.1 ADC Connections if the ADC Is Not Used .................................................................. 81 4.7.2 ADC Registers .................................................................................................. 82 4.7.3 ADC Calibration ................................................................................................. 83 4.8 Multichannel Buffered Serial Port (McBSP) Module .................................................................. 84 4.9 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B) .................................... 87 4.10 Serial Communications Interface (SCI) Modules (SCI-A, SCI-B, SCI-C) .......................................... 92 4.11 Serial Peripheral Interface (SPI) Module (SPI-A ) ..................................................................... 96 4.12 Inter-Integrated Circuit (I2C) ............................................................................................. 99 4.13 GPIO MUX ................................................................................................................ 100 4.14 External Interface (XINTF) .............................................................................................. 107 5 Device Support ................................................................................................................ 109 5.1 Device and Development Support Tool Nomenclature ............................................................. 109 5.2 Documentation Support ................................................................................................. 111 6 Electrical Specifications ................................................................................................... 116 6.1 Absolute Maximum Ratings ............................................................................................. 116 6.2 Recommended Operating Conditions ................................................................................. 117 6.3 Electrical Characteristics ................................................................................................ 117 6.4 Current Consumption .................................................................................................... 118 6.4.1 Reducing Current Consumption ............................................................................. 120 6.4.2 Current Consumption Graphs ............................................................................... 121 6.4.3 Thermal Design Considerations ............................................................................. 122 6.5 Emulator Connection Without Signal Buffering for the DSP .......................................................
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