Ctp_cdnlive2005_1329mohindru.pres

Ctp_cdnlive2005_1329mohindru.pres - Comprehensive SoC Power...

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Comprehensive SoC Power Grid verification using VoltageStorm Navneet Mohindru, VoltageStorm Product Validation Lead Lalit Garg, VAVO Product Engineer
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2 Agenda Introduction Static and Dynamic IR drop analysis using VoltageStorm SoC Hierarchical Analysis Methodology Results and Observations Conclusions Q&A
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3 Introduction Low power supply voltage causing IR drop problems in SoC designs Increasing demand to handle analog blocks in SoC Have their own dedicated supplies Must account for block boundary voltages IR drop/ground bounce from top-level power routing Some analog blocks share digital power supplies Integration with VoltageStorm Base SoC power integrity product Hierarchical, cell-based approach Utilizes abstracted power grid views Mix & match power grid views for complete solution
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4 Static and Dynamic IR drop analysis using VoltageStorm VoltageStorm supports both static and dynamic IR drop analysis
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5 Static IR drop analysis using VoltageStorm Static IR drop analysis verifies robustness of power rail by showing static IR drop, open circuits, missing vias and high current densities Static IR drop analysis is based upon average power calculated by powermeter Average power calculation is based upon three methods Full-chip VCD Accura based switching probability propagation method Mixture of Accura and VCD
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6 Dynamic IR drop analysis using VoltageStorm Dynamic IR drop analysis is used for analyzing the effect of transient IR drop Helps in optimizing number of decoupling capacitors to reduce leakage in 90nm and sub-90nm designs Based upon instance based dynamic current consumption
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Ctp_cdnlive2005_1329mohindru.pres - Comprehensive SoC Power...

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