Lecture 8

Lecture 8 - 1 ECE52 Spring 11 Lecture 8 MIDTERM 1 IN CLASS...

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Unformatted text preview: 1 ECE52 Spring 11 Lecture 8 1/31/11 MIDTERM 1 IN CLASS 2/18/11 Closed Book; 1 sheet (1 side) of notes 2 Figure 3.33. A section of the CPLD in Figure 3.32. D Q D Q D Q PAL-like block (details not shown) PAL-like block 3 “Our” CPLD: Altera MAX EPM7128SLC84 • Compatible chip still available at DigiKey, about $19 • About 2,500 usable gates, 100 I/O pins (68 with our packaging) altera.com 4 Logic minimization: Related but Distinct Problem: how many binary functions of n variables are there? • n inputs means 2 n entries in truth table • each entry in the truth table can be 0 or 1 • so possible truth tables == functions • For 2 variables, 16 possible functions – AND OR NAND NOR XOR XNOR “1” “0” – and 8 more harder to name functions like f=x 1 x 2 ’ n 2 2 5 Problem 2.25 for instance… ENTITY prob2_25 IS PORT (x1, x2, x3, x4, x5 : IN BIT; f : OUT BIT ); END prob2_25; ARCHITECTURE LogicFunc of prob2_25 IS BEGIN f <= (NOT x1 AND NOT x3 AND NOT x5) OR (NOT x1 AND NOT x3 AND NOT x4) OR (NOT x1 AND x4 AND x5) OR (x1 AND NOT x2 AND NOT x3 AND x5); END LogicFunc; 5 3 2 1 5 4 1 4 3 1 5 3 1 x x x x x x x x x x x x x f + + + = 6 Problem 2.25 via Quartus--A1L2 is i24~56--operation mode is normal A1L2 = !x1 & (x4 & x5 # !x3); x1’(x4x5+x3’)--A1L3 is i24~57--operation mode is normal A1L3 = A1L2 # x5 & !x2 & !x3; x2’x3’x5 … (defines x1-x5 as inputs)--f is f--operation mode is output f = OUTPUT(A1L3); 7 FPGAs – a generalization • Warning! Authors both work for/with Altera, whose main business is selling FPGAs… (but they sell CPLDs too)! – But what they say seems to be accurate. • Complexity: beyond simple PLDs – 7400 series TTL chips: 4-10 equivalent logic gates, up to maybe 100 for most complex – SPLD/CPLD: each macrocell about 20 gates, so small PAL: 160 gates, large CPLD with 500 macrocells maybe 10,000 gates • Not large in 2011! 8 FPGA’s – different from PAL/PLA • Not simply AND/OR planes but arrays of higher level logic blocks • 2-dimensional interconnection structure...
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This note was uploaded on 07/05/2011 for the course ECE 52 taught by Professor Dr.jonathanboard during the Spring '11 term at Duke.

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Lecture 8 - 1 ECE52 Spring 11 Lecture 8 MIDTERM 1 IN CLASS...

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