Lecture 22

Lecture 22 - ECE52 Spring 11 Lecture 22 3/4/11 Spring Break...

Info iconThis preview shows pages 1–14. Sign up to view the full content.

View Full Document Right Arrow Icon
ECE52 Spring 11 Lecture 22 3/4/11 Spring Break follows 1
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2 One more design example (from MIT OpenCourseware – needed in lock and vending machine!)
Background image of page 2
3
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
4
Background image of page 4
5
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
6
Background image of page 6
7
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
8
Background image of page 8
9
Background image of page 9

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
10
Background image of page 10
11 Finite State Machine M={S,X,Y, Φ , Ψ } • A finite, nonempty set S={s i } of states |S| <= 2 n for n flip flops • A finite, nonempty set X={x j } of primary inputs • A finite, nonempty set Z={z k } of outputs A state transition function Φ :X × S S S(t+1) = Φ (S(t),X(t)) An output function Ψ :X × S Z or Ψ :S Z Z(t+1) = Ψ (S(t),X(t)) Mealy machine Z(t+1) = Ψ (S(t)) Moore machine Synchronous (clocked) behavior is assumed
Background image of page 11

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
12 So – back to chapters 6, 7 Reason we jumped to chapter 8 and beyond was to motivate counters and other sequential machine designs which tumble fully functional out of the sky in chapter 7…
Background image of page 12
13 Chapter 6 – finish up combinational logic Building blocks – we were introduced to most of these a few weeks ago A few more advanced VHDL techniques for designing and manipulating combinational circuits
Background image of page 13

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 14
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 19

Lecture 22 - ECE52 Spring 11 Lecture 22 3/4/11 Spring Break...

This preview shows document pages 1 - 14. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online