EE-512-FLM-WEEK-1.pdf - ZILOG WITH 8K ROM PRODUCT SPECIFICATION Z86C21 8K ROM Z8\u00ae CMOS MICROCONTROLLER FEATURES \u25a0 8-Bit CMOS MCU with 8 Kbytes of ROM

EE-512-FLM-WEEK-1.pdf - ZILOG WITH 8K ROM PRODUCT...

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WITH 8K ROM Z ILOG P RODUCT S PECIFICATION 8-Bit CMOS MCU with 8 Kbytes of ROM 256 Byte Register File - 236 Bytes of General-Purpose RAM - 16 Bytes Control/Status Registers - 4 Bytes for Ports 40-Pin DIP, 44-Pin PLCC or 44-Pin QFP Package 4.5V to 5.5V Operating Range Low Power Consumption: 220 mW (max) @ 16 MHz Fast instruction pointer: 1.0 μs @ 12 MHz Two Standby Modes: STOP and HALT 32 Input/Output Lines FEATURES Z86C21 8K ROM Z8 ® CMOS M ICROCONTROLLER Full-Duplex UART All Digital Inputs are TTL Levels Auto Latches RAM and ROM Protect Two Programmable 8-Bit Counter/Timers each with 6-Bit Programmable Prescaler. Six Vectored, Priority Interrupts from Eight Different Sources Clock Speeds: 12 and 16 MHz On-Chip Oscillator that Accepts a Crystal, Ceramic Resonator, LC, or External Clock Drive. GENERAL DESCRIPTION The Z86C21 microcontroller is a member of the Z8 single- chip microcontroller family with 8 Kbytes of ROM and 236 bytes of RAM. The device is packaged in a 40-pin DIP, 44-pin PLCC, or a 44-pin QFP with a ROMless pin option available on the 44-pin versions only. With the ROM/ ROMless feature selectively, the Z86C21 offers both exter- nal memory and preprogrammed ROM, making it well- suited for high-volume applications or where code flexibil- ity is required. Zilog’s CMOS microcontroller offers fast execution, effi- cient use of memory, sophisticated interrupts, input/output bit manipulation capabilities, and easy hardware/software system expansion along with low cost and low power consumption. The Z86C21 architecture is characterized by Zilog’s 8-bit microcontroller core. The device offers a flexible I/O scheme, an efficient register and address space structure, multiplexed capabilities between address/data, I/O, and a number of ancillary features that are useful in many indus- trial and advanced scientific applications. For applications demanding powerful I/O capabilities, the Z86C21 provides 32 pins dedicated to input and output. These lines are grouped into four ports. Each port consists of eight lines, and is configurable under software control to provide timing, status signals, serial or parallel I/O with or without handshake, and an address/data bus for interfacing external memory. There are three basic address spaces available to support this configuration: Program Memory, Data Memory, and 236 general-pur- pose registers.
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WITH 8K ROM Z ILOG GENERAL DESCRIPTION (Continued) To unburden the program from coping with the real-time tasks, such as counting/timing and serial data communi- cation, the Z86C21 offers two on-chip counter/timers with a large number of user selectable modes, and an on-board UART. Port 3 UART Counter/ Timers (2) Interrupt Control Port 2 I/O (Bit Programmable) ALU FLAGS Register Pointer Register File 256 x 8-Bit Machine Timing and Instruction Control Prg. Memory 8192 x 8-Bit Program Counter Vcc GND XTAL 4 4 Port 0 Output Input Address or I/O (Nibble Programmable) 8 Port 1 Address/Data or I/O (Byte Programmable) /AS /DS R//W /RESET Figure 1. Z86C21 Functional Block Diagram Notes: All Signals with a preceding front slash, "/", are active Low, e.g.,
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  • Summer '20
  • Central processing unit, Interrupt, Programmable Interrupt Controller, Zilog

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