ee120a Lecture 14 - Datapath Components - Adders (Slides 2x1 bw)

# Ee120a Lecture 14 - Datapath Components - Adders (Slides 2x1 bw)

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1 Lecture 14 Datapath Components - Adders Instructor: Roman Chomko EE120A Logic Design, 10U Electrical Engineering University of California - Riverside Logic Design Datapath Components ADDERS EE120A Lecture 14 Lecture 14 Datapath Components - Adders Instructor: Roman Chomko EE120A Logic Design, 10U Electrical Engineering University of California - Riverside Adders square4 Adds two N-bit binary numbers square4 2-bit adder: adds two 2-bit numbers, outputs 3-bit result square4 e.g., 01 + 11 = 100 (1 + 3 = 4) square4 Can we design it using combinational design process? But it doesn’t work well for reasonable-size N square4 Why not? 0 1 0 1 1 0 1 0 1 1 0 0 1 0 0 1 0 0 1 1 0 1 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 s0 0 1 0 1 1 0 1 0 s1 0 0 1 1 0 1 1 0 c 0 0 0 0 0 0 0 1 b0 0 1 0 1 0 1 0 1 b1 0 0 1 1 0 0 1 1 a1 0 0 0 0 0 0 0 0 Inputs Outputs a0 0 0 0 0 1 1 1 1

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3 Lecture 14 Datapath Components - Adders Instructor: Roman Chomko EE120A Logic Design, 10U

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