EWEEE

EWEEE - 08-1 08-1 Interrupts and Exceptions Notes Material...

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Unformatted text preview: 08-1 08-1 Interrupts and Exceptions Notes Material in this set from Section 3.6. The book uses exception as a general term for all interrupts . . . . . . in these notes interrupt is used as the general term . . . . . . and a narrower definition is used for exception. The definitions of trap, interrupt, and exception given here . . . . . . are not explicitly provided in the text . . . . . . but are widely used. 08-1 EE 4720 Lecture Transparency. Formatted 9:05, 25 March 2011 from lsli08. 08-1 08-2 08-2 Interrupts Interrupt: Event that requires OS attention. Operating system takes over computer . . . . . . attends to whatever caused the interrupt . . . . . . and (most of the time) resumes interrupted program. Interrupt Terminology Handler: The OS program that takes over in response to interrupt. Privileged Mode: A state in which the CPU controller and memory system . . . . . . do not restrict instructions that can be executed . . . . . . or memory that can be accessed. Processor switches into privileged mode in response to interrupt . . . . . . and out of privileged mode when resuming the program. 08-2 EE 4720 Lecture Transparency. Formatted 9:05, 25 March 2011 from lsli08. 08-2 08-3 08-3 Three Types of Interrupts. Three Types: Trap: Sort of a subroutine call to OS. Exception: Something went wrong, triggered by an executing instruction. Exception has both a general and this specific meaning. Hardware Interrupt: Something outside the CPU is trying to get the computers attention. Interrupt has both a general and this specific meaning. 08-3 EE 4720 Lecture Transparency. Formatted 9:05, 25 March 2011 from lsli08. 08-3 08-4 08-4 Traps Trap: (1) An instruction intended for user programs that transfers control to the operating system (privileged code). (2) The execution of such an instruction. Sort of a subroutine call to OS. Trap causes branch to OS code and a switch to privileged mode . Privileged Mode: a.k.a. System Mode and Supervisor Mode A processor mode in which there are fewer restrictions on instruction execution. Some instructions can only be executed in privileged mode. When in privileged mode a trap handler is executed to service request. Trap Handler: A program, running in privileged mode that responds to a trap. Traps typically used for I/O, memory allocation, etc. 08-4 EE 4720 Lecture Transparency. Formatted 9:05, 25 March 2011 from lsli08. 08-4 08-5 08-5 Example, SPARC V8 trap instruction: ta ( rs1 ) , ( imm ) . ISA has a trap base register (TBR) that is used to construct the trap address. Trap handler starts in trap table , each entry holds first four instructions of trap handler. Trap Address Construction: OS initializes TBR with upper 20 bits of trap table base....
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This note was uploaded on 07/18/2011 for the course EE 4720 taught by Professor Staff during the Spring '08 term at LSU.

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EWEEE - 08-1 08-1 Interrupts and Exceptions Notes Material...

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