lec15 - LECTURE - 15 Further Topics in ILP Multiple issue...

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Unformatted text preview: LECTURE - 15 Further Topics in ILP Multiple issue Software support Hardware support Increasing ILP through Multiple Issue With at most one issue per cycle, min CPI possible is 1 But there are multiple functional units Hence use multiple issue Two ways to do multiple issue Superscalar processor Issue varying number of instructions per cycle Static or dynamic scheduling Very Large Instruction Word (VLIW) Issue a fixed number of instructions Superscalar DLX Simple version: two instructions issued per cycle One integer (load, store, branch, integer ALU) and one FP Instructions paired and aligned on 64-bit boundaries – int fi rst, FP next CC1 CC2 CC3 CC4 CC5 CC6 Integer IF ID EX MEM WB FP IF ID EX MEM WB Integer IF ID EX MEM WB FP IF ID EX MEM WB Superscalar DLX (continued) No conflicts, almost... Assuming separate register sets, only FP load, store, move cause problems Structural hazard on register port New RAW hazard between a pair of instructions Structural hazard: Detect, and do not issue the FP operation...
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lec15 - LECTURE - 15 Further Topics in ILP Multiple issue...

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