lec17 - LECTURE 17 LECTURE 17 Speculation Wish to move...

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LECTURE - 17
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LECTURE - 17
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Speculation Wish to move instructions across branches To eliminate possible stalls For better scheduling Appropriate conditional instructions may not always exist Example: if (N == 0) { A = *X; } else { A++; }
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Speculation: An Example Compiler predicts that the the n” clause is most likely Speculatively schedules the th en” clause Eliminates 2 stalls, and the JMP instruction LW R1, 0(R2) // Load N BNEZ R1, L1 // Test N LW R3, 0(R4) // Load X LW R5, 0(R3) // Load *X JMP L2 // Skip else L1: LW R5, 0(R6) // Load A ADDI R5, R5, #1 // Incrmt. L2: SW 0(R6), R3 // Store A LW R1, 0(R2) // Load N LW R3, 0(R4) // Load X LW R5, 0(R3) // Load *X BEQZ R1, L3 // Test N LW R5, 0(R6) // Load A ADDI R5, R5, #1 // Incrmt. L2: SW 0(R6), R5 // Store A
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Exception Behaviour Terminating vs. non-terminating exceptions While doing such scheduling: Correct program ==> no extra terminating exceptions Incorrect program ==> should preserve any terminating exceptions LW R1, 0(R2) // Load N LW R3, 0(R4) // Load X LW R5, 0(R3) // Load *X BEQZ R1, L3 // Test N LW R5, 0(R6) // Load A ADDI R5, R5, #1 // Incrmt. L2: SW 0(R6), R5 // Store A
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Preserving Exception Behaviour Approach 1: ignore terminating exceptions for speculated instructions Incorrect programs may not be terminated LW R1, 0(R2) // Load N LW* R3, 0(R4) // Load X, speculated LW* R5, 0(R3) // Load *X, speculated BEQZ R1, L3 // Test N LW R5, 0(R6) // Load A ADDI R5, R5, #1 // Incrmt. L2: SW 0(R6), R5 // Store A
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Preserving Exception Behaviour (continued) Approach 2: poison bits Set poison bit in result register of conditional
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