Lec19 - LECTURE 19 Topics for Today Cache Performance Cache Misses The Three C's Improving the Cache Miss Rate Scribe Cache Performance Miss rate

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Unformatted text preview: LECTURE - 19 Topics for Today Cache Performance Cache Misses: The Three C's Improving the Cache Miss Rate Scribe? Cache Performance Miss rate is an important metric But not the only one Hit time, Miss penalty can be expressed In absolute terms, Or, in terms of number of clock cycles Miss rate decrease may imply reduced performance Example: unified vs. split cache Avg. mem. access time Hit time Miss rate Miss penalty CPU Performance, with Cache CPU time CPU cycles + Mem. stall cycles Cycle time Mem. stalls Reads Read miss rate Read miss penalty Writes Write miss rate Write miss penalty CPU time IC Cycle time CPI Mem. accesses instn. Miss rate Miss penalty Effect of Cache on Performance Some typical values: CPI = 1 Mem. per instn. = 1.35 Miss rate = 2% Miss penalty = 50 Mem. stalls comparable to CPI! Cache behaviour is an important component of performance More important for lower CPI Improving Cache Performance Three possibilities: Reduce miss rate Reduce miss penalty Reduce hit time Beware of slowing down the CPU! Example: Set associative ==> potentially higher cycle time Avg. mem. access time Hit time Miss rate Miss penalty Cache Misses: The Three C's Compulsory: first access to a block Also called cold start, or first reference misses Capacity: misses due to cache being small Conflict: two memory blocks mapping onto the same cache block Also called collision, or interference misses The Three C's Cache size Associativity Compulsory...
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This note was uploaded on 07/14/2011 for the course CS 422 taught by Professor Hogakoi during the Spring '10 term at IIT Kanpur.

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Lec19 - LECTURE 19 Topics for Today Cache Performance Cache Misses The Three C's Improving the Cache Miss Rate Scribe Cache Performance Miss rate

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