05_timing

05_timing - Basic Technology CMOS Basic Components CMOS...

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CS151B 2011, Y. Tamir, extensively modified, based on slides © UCB 1997 5.1 ° CMOS: Complementary Metal Oxide Semiconductor • NMOS (N-Type Metal Oxide Semiconductor) transistors • PMOS (P-Type Metal Oxide Semiconductor) transistors ° NMOS Transistor • Apply a HIGH (Vdd) to its gate turns the transistor into a “conductor” • Apply a LOW (GND) to its gate shuts off the conduction path Basic Technology: CMOS Vdd = 5V GND = 0v GND = 0v Vdd = 5V ° PMOS Transistor • Apply a HIGH (Vdd) to its gate shuts off the conduction path • Apply a LOW (GND) to its gate turns the transistor into a “conductor” CS151B 2011, Y. Tamir, extensively modified, based on slides © UCB 1997 5.2 ° Inverter Operation Vdd Out In Symbol Circuit Basic Components: CMOS Inverter Out In Vdd Vdd Vdd Out Open Discharge Open Charge Vin Vout Vdd Vdd PMOS NMOS CS151B 2011, Y. Tamir, extensively modified, based on slides © UCB 1997 5.3 Basic Components: CMOS Logic Gates NAND Gate NOR Gate Vdd A B Out Vdd A B Out Out A B A B Out ABO u t 00 1 01 1 10 1 11 0 u t 01 0 10 0 CS151B 2011, Y. Tamir, extensively modified, based on slides © UCB 1997 5.4 Ideal versus Reality: Gate Delay ° When input 0 1, output 1 0 but NOT instantly • Output goes 1 0: output voltage goes from Vdd (5v) to 0v ° When input 1 0, output 0 1 but NOT instantly • Output goes 0 1: output voltage goes from 0v to Vdd (5v) ° Voltage does not like to change instantaneously Out In Time Voltage 1 Vdd Vin 0 GND
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CS151B 2011, Y. Tamir, extensively modified, based on slides © UCB 1997 5.5 Series Connection ° Total Propagation Delay = Sum of individual delays = d1 + d2 ° Capacitance C1 has two components: • Capacitance of the wire connecting the two gates • Input capacitance of the second inverter Vdd Cout Vout Vdd C1 V1 Vin Time V1 Vout G1 G2 G1 G2 Voltage Vdd GND V1 Vout Vdd/2 d1 d2 parasitic capacitance CS151B 2011, Y. Tamir, extensively modified, based on slides © UCB 1997 5.6 Calculating Delays ° Sum delays along serial paths ° Delay (Vin V2) != Delay (Vin V3) • Delay (Vin V2) = Delay (Vin V1) + Delay (V1 V2) • Delay (Vin
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This note was uploaded on 07/17/2011 for the course CS M151B taught by Professor Tamir during the Summer '11 term at UCLA.

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05_timing - Basic Technology CMOS Basic Components CMOS...

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