04s_cpe422_hw2_solution - The University of Alabama in...

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The University of Alabama in Huntsville Electrical and Computer Engineering CPE/EE 422/522 Spring 2004 Homework #2 Solution 1.8 A synchronous sequential network has one input and one output. If the input sequence 0101 or 0110 occurs, an output of two successive 1s will occur. The first of these 1s should occur coincident with the last input of the 0101 or 0110 sequence. The network should reset when the second 1 output occurs. For example, input sequence: X = 010011101010 101101… output sequence: Z = 000000000011 000000. . (a) Derive a Mealy state graph and table with a minimum number of states (6 states). NS Z PS X = 0 X = 1 X = 0 X = 1 S0 S1 S0 0 0 S1 S1 S2 0 0 S2 S3 S4 0 0 S3 S1 S5 0 1 S4 S5 S0 1 0 S5 S0 S0 1 1 State Assignment Guidelines: I {S0, S1,S3}{S0 ,S4, S5} II {S0, S1}{S1, S2}{S3, S4}{S1, S5}{S0, S5} III {S0, S1, S2} NS Z JaKa JbKb JcKc PS X = 0 X = 1 X = 0 X = 1 X = 0 X = 1 X = 0 X = 1 X = 0 X = 1 000 001 001 1 1 0d 0d 0d 0d 1d 1d 001 011 001 0 0 0d 0d 1d 0d D0 D0 010 111 101 0 0 1d 1d D0 D1 1d 1d 011 011 010 0 0 0d 0d D0 D0 D0 D1 100 ddd ddd D D Dd Dd Dd Dd Dd Dd 101 000 001 1 0 D1 D1 0d 0d D1 D0 110 ddd ddd D D Dd Dd Dd Dd Dd Dd 111 011 000 0 1 D1 D1 D0 D1 D0 D1
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Q B 1 1 d Q A X Q C 0 J A 1 1 1 11 d 1 0 1 K A J B 1 1 1 1 1 1 1 1 1 1 1 1 1 1 K B J C K C 1 Q A Q A Q B Q B Q C Q C X X Q A Q A Q A X X X Q B Q B Q B Q C Q C Q C d 000 00 dd d d dddd d d d ddd d 0 d d d d d d d d d d JQ Q AB C = K A = 1 Q X BA C = KQ X Q X C =+ J C = 1 X Q Q X CB A B ZQQ QQXQQX BC + (b) Try to choose a good state assignment. Realize the network using J-K flip-flops and NAND gates. Repeat using NOR gates.
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04s_cpe422_hw2_solution - The University of Alabama in...

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