{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

09f_cpe431_chap4_6 - UAH Chapter 4(4th Ed CPE 431/531 CPE...

Info icon This preview shows pages 1–5. Sign up to view the full content.

View Full Document Right Arrow Icon
1 1 Electrical and Computer Engineering CPE 431/531 Chapter 4 - The Processor Dr. Rhonda Kay Gaede UAH Electrical and Computer Engineering Page 2 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.1 Introduction – Implementation Basics Performance Factors – Instruction Count – Cycle Time – CPI A Basic MIPS Implementation – Simple subset: lw, sw, add, sub, and, or, slt, beq, j Electrical and Computer Engineering Page 3 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.1 Introduction – Implementation Overview All instructions begin the same way – ______________________ – ______________________ Then, it depends on the instruction lw sw add et.al. beq Electrical and Computer Engineering Page 4 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.1 Introduction – Implementation: Datapath, Datapath + Control Datapath Datapath + Control Electrical and Computer Engineering Page 5 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.2 Logic Design Conventions – Classes and Values Two classes of logic – ______________ – ______________ Two logic values – ____________ – ____________ Electrical and Computer Engineering Page 6 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.2 Logic Design Conventions – Clocking Methodology A clocking methodology defines when signals can be _______ and when they can be _________. We assume an edge-triggered clocking methodology .
Image of page 1

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon