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09f_cpe431_chap4_9

# 09f_cpe431_chap4_9 - UAH Chapter 4(4th Ed CPE 431/531 UAH...

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1 1 Electrical and Computer Engineering CPE 431/531 Chapter 4 - The Processor Dr. Rhonda Kay Gaede UAH Electrical and Computer Engineering Page 2 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.1 Introduction – Implementation Basics Performance Factors – Instruction Count – Cycle Time – CPI A Basic MIPS Implementation – Simple subset: lw, sw, add, sub, and, or, slt, beq, j Electrical and Computer Engineering Page 3 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.1 Introduction – Implementation Overview All instructions begin the same way – ______________________ – ______________________ Then, it depends on the instruction lw sw add et.al. beq Electrical and Computer Engineering Page 4 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.1 Introduction – Implementation: Datapath, Datapath + Control Datapath Datapath + Control Electrical and Computer Engineering Page 5 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.2 Logic Design Conventions – Classes and Values Two classes of logic – ______________ – ______________ Two logic values – ____________ – ____________ Electrical and Computer Engineering Page 6 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.2 Logic Design Conventions – Clocking Methodology A clocking methodology defines when signals can be _______ and when they can be _________. We assume an edge-triggered clocking methodology . Electrical and Computer Engineering Page 7 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.3 Building a Datapath - Instruction Fetch and Sequencing Electrical and Computer Engineering Page 8 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.3 Building a Datapath - R-type Instruction Requirements Electrical and Computer Engineering Page 9 of 90 UAH CPE 431/531 Chapter 4 (4 th Ed.) 4.3 Building a Datapath: lw / sw Instruction Requirements

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