09f_cpe431_chap5_2

# 09f_cpe431_chap5_2 - CPE 431/531 Chapter 5 - Large and...

This preview shows pages 1–7. Sign up to view the full content.

1 1 Electrical and Computer Engineering CPE 431/531 Chapter 5 - Large and Fast: Exploiting Memory Hierarchy Dr. Rhonda Kay Gaede UAH Electrical and Computer Engineering Page 2 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.1 Introduction Programmers always want ________ amounts of ___ memory. Caches give that _______. Principle of Locality – Temporal Locality - _________________________ ____________________________ – Spatial Locality - _________________________ ____________________________ Build a memory ________.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
2 Electrical and Computer Engineering Page 3 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.1 Introduction - Cache Terminology Data is copied between only ____ levels at a time. The minimum data unit is a ________. If the data appears in the upper level, this situation is called a _______. The data not appearing in the upper level is called a ________. Electrical and Computer Engineering Page 4 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.1 Introduction – More Terminology The _____________ is the fraction of memory accesses found in the upper level. The ______________ is the fraction of memory accesses not found in the upper level. _____________ is the time to access the upper level of the memory hierarchy. The _________________ is the time to replace a block in the upper level with the corresponding block from the lower level, plus the time to deliver this block to the processor.
3 Electrical and Computer Engineering Page 5 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches – Burning Questions How do we know whether a data item is in the cache? If it is, ___ do we ___ it? The simplest scheme is that each item can be placed in exactly one place _______________. Mapping Electrical and Computer Engineering Page 6 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches - Accessing a Cache 22 26 22 26 16 3 16 18 16 110 111 110 101 100 011 010 001 000 Data Tag V Index

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
4 Electrical and Computer Engineering Page 7 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches - Mapping Implemented in Hardware Electrical and Computer Engineering Page 8 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches - Total Storage Required Example: – How many total bits are required for a direct- mapped cache with 16 KB of data and four-word blocks, assuming a 32-bit address?
5 Electrical and Computer Engineering Page 9 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches - Mapping an Address to a Multiword Cache Block Consider a cache with 64 blocks and a block size of 16 bytes. What block number does byte address 1200 map to? Electrical and Computer Engineering Page 10 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches - Miss Rate versus Block Size

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
6 Electrical and Computer Engineering Page 11 of 46 UAH CPE 431/531 Chapter 5 (4 th Ed.) 5.2 The Basics of Caches - Handling Cache Misses Instruction Cache Miss 1. Send the original PC value (current PC – 4) to
This is the end of the preview. Sign up to access the rest of the document.

## This note was uploaded on 07/22/2011 for the course CPE 431 taught by Professor Staff during the Fall '09 term at University of Alabama - Huntsville.

### Page1 / 23

09f_cpe431_chap5_2 - CPE 431/531 Chapter 5 - Large and...

This preview shows document pages 1 - 7. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online