COSC 513 Midterm May05

COSC 513 Midterm May05 - Southeastern University 501 I...

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Southeastern University 501 I Street SW Washington, DC 20024 Tel: (202) 488-8162 Fax: (202) 488-8093 Midterm Exam: November 2005 Course: COSC 513 Operating Systems Instructor: Prof. M. Anvari 1. The general role of an operating system is to: a. Act as an interface between various computers b. Provide a set of services to system users c. Manage files for application programs d. None of the above ANS : B 2. The four main structural elements of a computer system are: c. d. None of the above ANS : C 3. The two basic types of processor registers are: a. User-visible and Control/Status registers b. Control and Status registers c. User-visible and user-invisible registers d. None of the above ANS : A 4. Address registers may contain: a. Memory addresses of data b. Memory addresses of instructions c. Partial memory addresses d. All of the above ANS : D 5. A Control/Status register that contains the address of the next instruction to be fetched is called the: a. Instruction Register (IR) b. Program Counter (PC) c. Program Status Word (PSW) d. All of the above ANS : B 6. The two basic steps used by the processor in instruction processing are: a. Fetch and Instruction cycles b. Instruction and Execute cycles Page 1 of 10 COSC 513 Midterm Exam Prof. Anvari Student Name: _________________________ Student ID: ___________________________
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c. Fetch and Execute cycles d. None of the above ANS : C 7. A fetched instruction is normally loaded into the: a. Instruction Register (IR) b. Program Counter (PC) c. Accumulator (AC) d. None of the above ANS : A 8. A common class of interrupts is: a. Program b. Timer c. I/O d. All of the above ANS : D 9. When an external device becomes ready to be serviced by the processor, the device sends this type of signal to the processor: a. Interrupt signal b. Halt signal c. Handler signal d. None of the above ANS : A 10. Information that must be saved prior to the processor transferring control to the interrupt handler routine includes: a. Processor Status Word (PSW) b. Processor Status Word (PSW) & Location of next instruction c. d. None of the above ANS : B 11. One accepted method of dealing with multiple interrupts is to: a. Define priorities for the interrupts b. Disable all interrupts except those of highest priority c. Service them in round-robin fashion d. None of the above ANS : A 12. In a uniprocessor system, multiprogramming increases processor efficiency by: a. Increasing processor speed b. Taking advantage of time wasted by long wait interrupt handling c. Eliminating all idle processor cycles d. All of the above ANS : B Page 2 of 10 COSC 513 Midterm Exam Prof. Anvari
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13. As one proceeds down the memory hierarchy (i.e., from inboard memory to offline storage), the following condition(s) apply: a. Increasing cost per bit
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COSC 513 Midterm May05 - Southeastern University 501 I...

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