{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

F4_Presentation_RC_Class_Fall09

F4_Presentation_RC_Class_Fall09 - F409: Dr Ann Gordon-Ross...

Info icon This preview shows pages 1–5. Sign up to view the full content.

View Full Document Right Arrow Icon
2009 Midyear Workshop F4-09: Virtual Architecture and Design  F4-09: Virtual Architecture and Design  Automation for Partial Reconfiguration Automation for Partial Reconfiguration All Hands Meeting November 10th, 2009 Dr. Ann Gordon-Ross Assistant Professor of ECE University of Florida Dr. Alan D. George Professor of ECE University of Florida Abelardo Jara Terence Frederick Rohit Kumar Shaon Yousuf Research Students University of Florida
Image of page 1

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Outline Goals, Motivation and Challenges Virtual Architecture for Partially Reconfigurable Embedded System (VAPRES) Design methodology Multiple clock domains support Bitstream relocation MACS Inter-module Communication Architecture Case Study Application: Embedded Target Tracking System on Virtex-4 FPGA board Preliminary non-PR version using Kalman filters Design Automation for Partial Reconfiguration (DAPR) DAPR design flow VHDL annotations Connectivity file and graph Device library file Overlay generation
Image of page 2
3 GOAL – Leverage partial reconfiguration (PR) for application designers Architect and implement a Virtual Architecture (VA) for Partially Reconfigurable Embedded Systems Ease PR design via design automation MOTIVATIONS – Increase productivity and reduce design complexity for PR designs VA reduces development time Dynamically load and unload hardware processing modules Processing hardware adapts to external environmental conditions Automated design flow makes PR more amenable system designers Current PR design flow requires very high level of specialization Simplifies design of systems that time-multiplex FPGA resources → smaller devices CHALLENGES Provide sufficient VA flexibility with architectural parameterization Balancing enough application specialization with exploration complexity Creating new exploration algorithms/heuristics to automate PR design flow steps with respect to available PR tools 3 Goals, Motivations, and Challenges Goals, Motivations, and Challenges Sensor Interface Central Controlling Agent ICAP Processed output Filter repository Filter A Filter B PRR Filter A External Trigger Sensor Coverage Area
Image of page 3

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
4 Expand and prototype an FPGA-based architecture for rapid development of PR embedded systems VAPRES: Virtual Architecture for Partially Reconfigurable Embedded Systems MACS: Minimal Adaptive Circuit Switching mesh inter-module communication architecture for VAPRES Improvement over F4-08 SCORES communication architecture Architectural support for hardware module context save and restore Formulate and implement an automated PR design flow DAPR: Design Automation for Partial Reconfiguration Tool Study Virtex-4 and Virtex-5 bitstreams to leverage additional functionalities Extend bitstream relocation and context save and restore for Virtex-5 F4-09 Approach F4-09 Approach Highly specialized PR system design Reconfiguration
Image of page 4
Image of page 5
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

What students are saying

  • Left Quote Icon

    As a current student on this bumpy collegiate pathway, I stumbled upon Course Hero, where I can find study resources for nearly all my courses, get online help from tutors 24/7, and even share my old projects, papers, and lecture notes with other students.

    Student Picture

    Kiran Temple University Fox School of Business ‘17, Course Hero Intern

  • Left Quote Icon

    I cannot even describe how much Course Hero helped me this summer. It’s truly become something I can always rely on and help me. In the end, I was not only able to survive summer classes, but I was able to thrive thanks to Course Hero.

    Student Picture

    Dana University of Pennsylvania ‘17, Course Hero Intern

  • Left Quote Icon

    The ability to access any university’s resources through Course Hero proved invaluable in my case. I was behind on Tulane coursework and actually used UCLA’s materials to help me move forward and get everything together on time.

    Student Picture

    Jill Tulane University ‘16, Course Hero Intern