Fabrication of InP-SiO2-Si substrate using ion-cutting process and selective chemical etching

Fabrication of InP-SiO2-Si substrate using ion-cutting process and selective chemical etching

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Unformatted text preview: Fabrication of InP/SiO 2 /Si substrate using ion-cutting process and selective chemical etching Peng Chen a , Dapeng Xu b , Luke Mawst b , K. Henttinen c , T. Suni c , I. Suni c , T. F. Kuech d , and S. S. Lau a a Department of Electrical and Computer Engineering, University of California, San Diego, La Jolla, California 92093 b Electrical and Computer Engineering Department, University of Wisconsin, Madison, Wisconsin, 53706 c VTT Technical Research Centre of Finland, MEMS and Micropackaging, Tietotie 3, 02150 Espoo, Finland d Department of Chemical and Biological Engineering, University of Wisconsin, Madison, Wisconsin, 53706 In this study, an InP layer was transferred onto a Si substrate coated with a thermal oxide, through a process combining ion-cutting process and selective chemical etching. Compared with conventional ion-cutting of bulk InP wafers, this layer transfer scheme not only takes advantage of ion-cutting by saving the remaining substrates for reuse, but also takes advantage of selective etching to improve the transferred surface conditions without using the chemical and mechanical polishing. An InP/InGaAs/InP heterostructure initially grown by MOCVD was implanted with H + ions. The implanted heterostructure was bonded to a Si wafer coated with a thermal SiO 2 layer. Upon subsequent annealing, the bonded structure exfoliated at the depth around the hydrogen projected range located in the InP substrate. Atomic force microscopy showed that after selective chemical etchings on the as-transferred structure, a final structure of InP/SiO 2 /Si was obtained with a relatively smooth surface. Introduction Ion-cutting process, which is commercially used to transfer a thin layer of Si onto insulators to form silicon-on-insulator (SOI) substrates, is also considered as a promising method for III-V materials transfer and integrations (1-4). In particular, transfer of III-V materials onto Si substrates via wafer bonding could overcome the difficulty of epitaxial growth caused by the lattice mismatch between different materials. However, hydrogen-induced ion-cutting process usually creates a rough as-transferred surface due to the H implantation, and/or the nonuniformity at the bonding interface. For the ion-cutting of silicon, the as-transferred Si surface has a typical root mean square (RMS) ECS Transactions, 6 (1) 99-103 (2007) 10.1149/1.2727392, © The Electrochemical Society 99 100 surface roughness of ~10nm (5,6). To improve the as-transferred surface conditions, a chemical mechanical polishing (CMP) process is widely used on Si-based materials. With a well-controlled CMP process, the surface could be polished down to a RMS of less than 0.2nm (7). In the case of III-V ion-cutting, the reported surface roughness of as-transferred surface is also ~10nm or higher (4,8). In one study the authors improved the as-transferred InP surface roughness from 8.0nm to 0.6nm with an optimized CMP (8). However, the CMP process for III-V materials is not well developed. Moreover, the (8)....
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This note was uploaded on 07/27/2011 for the course EE 103 taught by Professor Qi during the Spring '10 term at Hobart and William Smith Colleges.

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Fabrication of InP-SiO2-Si substrate using ion-cutting process and selective chemical etching

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