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Unformatted text preview: CSC 258 lab notes, Fall 2003 Instructor: E. R. C. Hehner Lab demonstrators: Nicolas Kokkalis, Andr´ es Lagar Cavilla Successful completion of the three graded labs in this course involves a significant amount of preparation work. Much of your grade will be based on your preparation. Prior to the lab, you will design circuits and plan how to wire them up. During the lab, you might make changes to your plan based on comments from your lab TA; then you will do your wiring, and test and debug your circuit. You will not have time during the lab to do substantial circuit design nor even to decide which chips and pins to use, so good preparation is essential. Each graded lab will have a handout, which is like a problem set or assignment. It poses problems, the solutions to some of which involve circuit design, the solutions to others of which are written. In this way, the lab handouts are similar to assignment handouts. However, for the lab handouts you will also be building the circuits which you have designed. That is what this document is about. Lab teams You are expected to form teams of two students for the purpose of working on the labs. Try to find a lab partner as soon as possible. Your team must jointly sign up for one of the groups scheduled to us the lab every third week. (If there are an odd number of students in the course, one person will work alone; other than that, you must form teams of two.) You have a responsibility to your lab partner to inform them as early as possible if you will miss a lab or if you drop the course. We strongly recommend that you exchange e-mail addresses, telephone numbers, and all other contact information with your lab partner. Implementation plan Building circuits involves many practical issues which we ignore when initially sketching our logic diagrams. Experience with these issues is the purpose of the lab. You will be using gates and other circuits on SSI and MSI chips. These chips require power and ground connections in addition to the connections implied by the logic schematics, and gates may not be available in precisely the configurations implied by your schematics—you may want a three-input OR gate, but have to use a four-input gate, or three two-input gates. We will distribute data sheets listing the chips available in the lab. In order to construct your circuit, you first need to decide which gate to use in each chip. You should make a list of chips needed, give them names of “A”, “B”, etc, and label each gate in your logic circuit with one of these letters. Then you should label each wire going into and out of each of these gates with a pin number. (See example, below.) If you are not clear about the exact properties of one of the chips described on the data sheets, make a note and be sure to ask your lab TA for clarification at the beginning of the lab. There are also reference books which your lab TA will show you....
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This document was uploaded on 08/02/2011.
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