lab5_adc_pnp_ramp_generator

lab5_adc_pnp_ramp_generator - Transistor-Based Ramp...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Transistor-Based Ramp Generator Lab 5: Analog-to-Digital Conversion ECE 327: Electronic Devices and Circuits Laboratory I Abstract For the analog-to-digital conversion lab, we need a resetable ramp generator. Here, we explore building a ramp generator from a current source. We show two implementations that both use a PNP current source. Contents 1 Introduction 1 2 Transistor Top Regulation 2 Resistor-Biased Ramp Generator . . . . . . 3 Diode-Biased Ramp Generator . . . . . . . 4 A Parts 5 1 Introduction Our goal is to build a ramp generator like 10 V 0 V Reset The signals available to us are 10 V, 0 V, and a reset signal. The output should be a ramp train that resets to 0 V when the reset signal is asserted, and we assume that the reset signal will be asserted when the ramp reaches 8 V or sooner (i.e., the ramp generator has an 8 V compliance ). We implement the ramp generator with a pnp current source that drives a capacitor that can be discharged with a switch. Sawtooth generation: This ramp generator can be used to produce a sawtooth wave by connecting the ramp generators reset input to a short pulse that is asserted at regular intervals. As long as the ramp generator does not saturate (i.e., go out of compliance) between pulses, the output will be a sawtooth. PWM and Ramp Slope: The ramp generator will be used with a comparator to generate a pulse-width- modulated (PWM) signal. (i) The ramp and PWM signal reset low on a 30 kHz clock with period T 33 s. (ii) The PWM signal transitions high whenever the ramp crosses the 28 V input from below. (iii) The PWM signal drives a light-emitting diode (LED) that transmits to a detector equipped with a Schmitt trigger which gives it hysteresis . So PWM transitions must be spaced at least 6 s apart to be detected (i.e., 6 s is the minimum negative pulse width and positive pulse width ). So, after a reset, the ramp must not cross 2 V before 6 s, and the ramp must cross 8 V no later than ( T 6 s) 27 s. Hence, the ramp slope r must be so that . 297 V s 8 V 27 s 8 V T 6 s r 2 V 6 s . 33 V s . (1.1) In practice, the actual ramp will be an exponential (due to capacitor and switch leakages) and the actual ramp slope may need to be slightly increased....
View Full Document

Page1 / 5

lab5_adc_pnp_ramp_generator - Transistor-Based Ramp...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online