H62ELD Exam Paper 2008

# H62ELD Exam Paper 2008 - H62ELD-E1 The University of...

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H62ELD-E1 The University of Nottingham SCHOOL OF ELECTRICAL AND ELECTRONIC ENGINEERING A LEVEL 2 MODULE, SPRING SEMESTER 2007-2008 ELECTRONIC ENGINEERING Time allowed THREE Hours Candidates must NOT start writing their answers until told to do so Answer ALL questions from SECTION A and TWO questions from SECTION B . Marks awarded for sections of questions are shown in brackets after the relevant section. Only silent, self contained calculators with a Single-Line Display or Dual-Line Display are permitted in this examination. Dictionaries are not allowed with one exception. Those whose first language is not English may use a standard translation dictionary to translate between that language and English provided that neither language is the subject of this examination. Subject specific translation dictionaries are not permitted. No electronic devices capable of storing and retrieving text, including electronic dictionaries, may be used. DO NOT turn examination paper over until instructed to do so ADDITIONAL MATERIAL: Handout 1 : Data Sheet on CMOS SN74LVC Handout 2 : 16V8PAL data Sheet Handout 2A: Logic diagram for 16V8PAL H62ELD-E1 Turn over

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2 H62ELD-E1 SECTION A – Answer ALL questions in this section. You should spend about an hour and a half on this section. 1. (a) The circuit in Figure Q1(a) represents a Schmitt trigger. The output voltage from the comparator is 10 V. It is required that the Upper Trigger Point should be 6 V. Determine the required value of R. [2 marks] Figure Q1(a) (b) A square wave oscillator is shown in Figure Q1(b). The capacitor is initially uncharged and the comparator output is initially at +V max . Explain how this circuit produces square waves. [2 marks] Figure Q1(b) H62ELD-E1
3 H62ELD-E1 (c) In a feedback oscillator, the gain of the amplifier is A and the amplitude response of the frequency selective circuit is B at the frequency of interest. i) Initially there is just noise in the system. Explain how a sine wave of the required frequency is produced. [1 mark] ii) State the condition at start up for the sine wave in i) to be amplified around the loop. [1 mark] (d) A Flash ADC converts an input analogue signal to 16 bits. The power dissipated by each comparator is 5 mW. Determine the total power dissipated by the ADC and explain the significance of your result to the limitations of using this ADC in practice. [2 marks] (e) A 14 bit dual-slope ADC has a clock frequency of 40 kHz. Determine the longest time for conversion. [2 marks] (f) Determine the logic function performed by the CMOS circuit in Figure Q1(f), giving reasons for your answer. [4 marks] A B V dd Q 1 Q 2 Q 3 Q 4 Z Figure Q1(f) (g) Simplify the right-hand side of the following logic relation B A A Z . [1 mark] H62ELD-E1 Turn over

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4 H62ELD-E1 (h) Consider the following VHDL code: library IEEE; use IEEE.std_logic_1164.all; entity T0802B is port ( A: in STD_LOGIC; B: in STD_LOGIC; C: in STD_LOGIC; F: out STD_LOGIC ); end T0802B; architecture T0802B_arch of T0802B is
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## This note was uploaded on 08/14/2011 for the course ELECTRONIC H62ELD taught by Professor Professore during the Spring '09 term at Uni. Nottingham.

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H62ELD Exam Paper 2008 - H62ELD-E1 The University of...

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