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Unformatted text preview: hexadecimal addresses: 400 404 408 40C 4F4 4F0 400 404 418 41C 44C 4F4 (i) Which bit(s) of the address are used to identify a word in a memory block? (ii) Hence, assuming that the cache is initially empty, show the content of the cache at the end of each pass through this loop if a direct mapping cache. Give your answers in the format of Table Given. (iii) What is the hit ratio? 3. A set associative cache consists of 64 lines, or slots, divided into four-line sets. Main memory contains 4K blocks of 128 words each. Show the format of main memory addresses. CC2202-Computer System Architecture Lab 6 Page 2 content block Pass 1 Pass2 Pass3 400 1 2 3 4 5 6 7...
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- Summer '97
- CPU cache, main memory, Assume associative cache, small data cache