Exam3SolutionsSummer2001

Exam3SolutionsSummer2001 - ECE 3040B Microelectronic...

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Unformatted text preview: ECE 3040B Microelectronic Circuits Exam 3 July 24, 2001 Dr. W. Alan Doolittle '1. Print your name clearly and largely: 60, at 'l' l 0 h Instructions: Read all the problems carefiilly and thoroughly before you begin working. You are allowed to use 1 new sheet of notes (1 page front and back), your note sheets from the previous exams as well as a calculator. There are 100 total points in this exam. Observe the point value of each problem and allocate your time accordingly. SHOW ALL WORK AND CIRCLE YOUR FINAL ANSWER WITH THE PROPER UNITS INDICATED. Write legibly. If I cannot read it, it will be considered a wrong answer. Do all work on the paper provided. Turn in all scratch paper, even if it did not lead to an answer. Report any and all ethics violations to the instructor. Good luck! Sign your name on ONE of the two following cases: I DID NOT observe any ethical violations during this exam: I observed an ethical violation during this exam: ——___——_______—______ First 25% Multiple Choice and True/False (Select the most correct answer) 1.) (2-points) A MOS Transistor can be: a.) An enhancement mode NMOS device b.) A depletion mode PMOS device c.) An enhancement mode PMOS device . A depletion mode NMOS device a All of the above 2.) (2-points) Depletion mode MOS transistors have large DC gate currents but enhancement mode MOS transistors have no DC gate current. a. True False c.) I am totally confused on this question 3.) (3-points) True A “real world” (Non-ideal ) Op-Amp has infinite open loop gain. 4.) (3—points) The following condition defines the triode or linear region of operation of a (x NMOS Enhancement mode transistor. (7 a. VGs<VT and VD5<VGS " W 04" VGS>VT and Vos<VGs ' VT C. VGs>VT and VDS>VGS - VT d.) All of the above e.) I would much preferred you not asking this question. 5.) (3-points/ 1 0' each) For the following amplifier: a.) Is this a: Current, Tr conductance, or Transresistance Amplifier b.) Should this . i 1 1er have afir 0 input impedance for maximum voltage gain? c.) Should this amplifier have an High utput impedance for maximum voltage gain? RS R Old 6.) (12 points total: 2-points each) For each of the following circuits, identify the transistor configuration as Common Vcc Vcc Vcc ,__J Vin F V001 Vin '— V0“ 1: Common at? 56 Common C0 Hedi"- Common Drain Vcc Vcc _l_ § § § flout “ Vom Vout _% i ,__i : E g m Common em i'i-j'er‘ Common 6%” Common JaM’C—e Second 25% Short Answer: 7.) (ZS-points) Draw and label the energy band diagram of a PMOS Enhancement mode Capacitor in equilibrium, depletion and deep inversion (3 drawings) labeling the fermi, intrinsic, conduction and valence energies. The intrinsic energy is the dashed line. Equilibrium Depletion (see above labels) Deep Inversion (see above labels): Note the inverted layer is now p—type, thus the PMOS designation. Third 25% Problems (3rd 25%) 8.) (a. 15-points) Plot the voltage gain transfer function ( Voltage gain in dB vs. Log(frequency) ), Vent/Vin of the following circuit from le to 10MegHz showing the break frequencies and low and high frequency gains in dB. (b. 10-points) Determine the input resistance and output resistance of the following circuit. Hints for both parts: Treat the parallel resistor/capacitor combination as one impedance. If you do so, you can write the gain expression directly from the configurations we derived in class. Once you do this, you can simplify the transfer function into the standard form, from which the poles and zeros can be extracted. You may assume that the Op-Amps are ideal. 92 100k 6"“; lat” 1’0 I‘M/6H5? thlr'b/“fmhlafi' _|__ ,4“: 412m ~_ {31 ‘5 __ Qaligs :n R. (any? +0 I b / {jf’mm/‘V‘ +l‘e +Le v.7“ war TQ/‘V‘fif‘qG'L x, R. ‘F "R “fie—{l : Wrm‘ 6r0cm/ <7 Extra work can be done here, but clearly indicate with problem you are solving. [00 v/v r two“; oJE/Je Pulling all the concepts together for a useful purpose: (4th 25%) 9.) (ZS-points) Given the following circuit, what is the AC voltage gain, Vow/Vin? You may assume all capacitors have infinite capacitance and are thus, AC shorts. Additionally consider the circuit to be operated at low frequencies where you can neglect all small signal capacitances. Grading will be based as such: 10 points for DC solution, 15 points for small signal conversion/small signal analysis. Work out the answer. Do not just approximate the solution! Kn’=250 uA/V2 VT=1V 1:. V'1 Length (L)=10um Width (W):1000um I flCSUm 0 - - ' 9x“ a r“-”—_”:L kn ‘ 61506-6 Loam L2m_% (“fl/\Hl 9 5V 1 D‘ORS‘VA/V'A Extra work can be done here, but clearly indicate with problem you are solving. (Loaf 1) 5V " [/05 —~ I05 p5 ta 2 @0IR5 (@1303); —— 306105 4 rim/000%?) '2 W — 16,351}; + 3195115; 0.03l38 _\ A \ 0,0313? 7le; Lg; — {7(35-i05 +W:O 11,75 = 17.35‘i Q7.35)a_4(3.25)(a%i%§2;j 1 (3/525) [.3 bum/3F (9,00%? Ia; 2%127: * V05: 9— ewe/W) _ 2 W £4,076 1/ 0r'31'7m/q’ 0.0037 W61 * V05: 5— WOW) em 3,15 \/ v66 —_ 3.30% *1?“ (635%) V66 :2 1,3433 IDS: man/)— or” 105: 3.7% w .gyf §¢+wra¢w ah/ wee V“ 21,343 jq/DS: ring/rm},er Extra work can be done here, but clearly indicate with problem you are solving. gm: :05 1.375% l/ggwm “ may} 20.00% 5 13K A Bonus: (IO-points “All or Nothing”) Draw the cross-sectional View (View from the side) of a PMOS transistor biased in saturation mode. Label the source, gate, drain, channel, substrate and indicate the doping type of the source, drain and substrate. Also, indicate the relationship between VSG and VSD for which saturation is maintained. n-type \ Substrate \ / VSD >VSG+VTP (>0) ...
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This note was uploaded on 08/23/2011 for the course ECE 3040 taught by Professor Doolittle during the Spring '11 term at University of Florida.

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Exam3SolutionsSummer2001 - ECE 3040B Microelectronic...

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