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Exam3Spring2001Solutions - ECE 304GB Microelectronic...

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Unformatted text preview: ECE 304GB Microelectronic Circuits Exam 3 April 12, 2001 Dr. W. Alan Doolittle Solutions Print your name clearly and largely: Test Average 53.52174 Test Standard Deviation 16.32413 Broken down b uestion Questio 12345678910111 %Score per Question 100 71.7 73.9 56.5 68.1 71 60.9 72.6 65.1 38.7 46.7 28.5 1st25% 62.81159 2nd 25% 65.94203 3rd 25% 68.84058 4th 25% 28.52174 apBJE) OZ 0t 08 09 '09 00L Number of Test Scores N w h 0'! J— I Zlv L N._. mfonEo: ”—0 wmmacouhom F 2. o... .3 N... a , z i 1., :i‘ILvi . 1 iii: . :v\\‘ ‘ _ ‘ I ‘ ‘ I 3 _ I _ ‘ ‘ \ .iiixL:.|IJixl?Jll—: ° mum. 3. + 339553 mfoian: be ammacwewavmvmdv u 200m at mem 2:. 9.1003 9 max; First 25% Multiple Choice and True/False (Select the most correct answer) 1.) (5-points) A MOS Capacitor consists of three regions: a.) Metal, semiconductor and metal regions Metal, semiconductor and plastic @Metal, Oxide, and Semiconductor Wood, cement and gravel. 2.) (S-points) MOSFETs always need a non-zero Gate to Source Voltage to conduct a Drain- Source current (remember to consider PMOS and NMOS enhancement and depletion devices). True w False . I am totally confused on this question 3.) (3-points) True /, Feedback always has to be negative otherwise the circuit will not work (think about o s one carefully). 4.) (3-points) True The body terminal ofa MOSFET should always be connected to ground, regardless . whether the device is PMOS or NMOS. For each of the following amplifiers, identify the configuration (voltage, current, transconductance, transresistance), and whether you want to have a high or low input and output resistance. Circle your answer. 5.) (3-p01nts) a.) Voltage,,l‘ransconductan - or Transresistance b.) Input Impe-FI ce should be H315} c.) Output Impedance should * - .1”. i. gs!) RL 6.) - - ' d. m Current, Transcon tance, or Transresistance e.) Inpu pedance should f.) Output Impedance shouldbe Rs N—o + 7.) (3-points) g.) Voltage, Current, Transconduc .. o - h.) Input Impedance shouldbe Hi ; use» i.) Output Impedance should be Hi I 4.13) Second 25% Short Answer: 8.) (IO-points) Draw the cross-sectional View (View from the side) of a NMOS transistor biased in linear and in saturation modes (two separate drawings). Label the source, gate, drain, channel, substrate and indicate the doping type of the source, drain and substrate. Linear: P-type Substrate Saturation: VDsat VD ' I 9.) (IS-points) Draw and label the energy band diagram of a NMOS Enhancement mode Capacitor in equilibrium, depletion and deep inversion (3 drawings) labeling the fenni, intrinsic, conduction and valence energies. All regions are shown below (including accumulation, which was not asked for). In each picture, the left most material is the metal, then the oxide, with the rightmost material being the semiconductor. Ec Energy 3 , .. _ -Ei band EC Bf diagram 51‘ .. -Ei _ _ __ 2f Ef Ev :5 Ef Ev Applied dc Vc=0 VG<0 VT>VG>0 voltage Flat band Accumulation Depletion Inversion Third 25% Problems (3rd 25%) 10.) (IO-points) Determine the voltage gain, input resistance and output resistance of the following circuit. You may assume that the Op-Amps are ideal. F! 1 Va I"-."'l n V0 ut R1 V0=Vin =0.5Vin R1 + R2 Vb = (1+ fljya = 2V0 R1 VC = Vin Vout = —flVb'-&Vc R1 R1 Vout = -2Va _ Vin Vout = -Vin _ Vin Vout =_2 V/V Kin"; afli K9“ :0 [V;.\-=0==7 Vb2i/C'50] l 1.) (IS—points total in two parts) (a) (lZ-points) As an integrated circuit designer, you are asked‘to determine the width (W in J aeger, Z in Pierret) of a MOSFET gate required to achieve a small signal transconductance of 0.01 AN when used in a circuit that will have a Source-to-Gate voltage, VGs=l .SV, a Source-to-Drain voltage, VDs=5V, and a Source-to-Body voltage, V35=0.0V. (b) (3-points) What is the drain-source current in this application? The fabrication process you are using has the following parameters: Gate Length, L=l um Effective mobility, E5200 cmzNSec Oxide Thickness, t“: xox =200nm Channel Length Modulation parameter, 1:01 V" Substrate Doping, NA=le15 cm”3 Oxide relative Dielectric Constant, Emme=Ko=39 Substrate relative Dielectric Constant, epmmmm=Ks=l 1.7 Substrate intrinsic concentration, m=l e10 cm'3 Dielectric Constant of fiee space, so =8.854e-l4 F/cm MI:— 9m— la, (“55‘ “rt/>(lrM/os) I05 9 0 )1’ 7"” : Qés-VTV) ‘— O I , a, 6 -— = ____o__x _ _3F Kn: }L’ fl,‘ Cox Cox TM L7,?6e A: 15/3 hCCP/ VT‘M' g' A66 Vl3$_ _ —0 dh/ Nf'ws (NA 5103‘ ijllen/ ”figs?“ :4 awe (1)165)“ -I -.-;==>7\/n/: R(0.2‘t$) + (ff/“ml“ 9 /Qf—;~’-él7)$aq5“¢w ‘1 ’ W: m 7 (9,01 m%)é0(9)l72929](l5-l.‘H)-(I+0l<f)> :74)’Z: 2 1') CM? If via/Te} a Inge Jet/'46 +0 mee+ fills Xesfja /C~’ fire/«am 19> Pulling all the concepts together for a usefirl purpose: (4th 25%) 12 ) (ZS-points) Given the following circuit, (a) Identify the configuation of all stages in the amplifier. (b) What rs the AC voltage gain, Vow/Vin ? You may assume all capacitors have infinite capacitance and are thus, AC shorts. Additionally consider the circuit to be operated at low frequencies where you can neglect all small signal capacitances. Grading will be based as such: 4 points for configuration identification, 8 points for DC solution, 4 points for small signal conversion, and 9 points for small signal analysis. Common gource Common ram M Kn=250W2 VT=1V 1:01 v-1 DC' M’l'. ATak’fip «Therm/«m ,h +112 (are cl’rmH. N013 I V‘f‘x: VGS‘ . V05 : lav— fp5QOK> /———— 1 NOV 459(4th gain/owl“ j I03 ((+05) = W4 « I Extra work can be done here, but clearly indicate with problem you are solving. V0; 2 l0~ 666,6”4 (mid I 2 "' ~ :1 / 23.3w 7vts—V'r- 3 x /4 fo'Oh a'f {aflcmf/ah 1'5 l/d/I'IG/ km W M); I'hée rke 0C cu/Nh‘f 5;ng Car/YIN; H014. mace!“ be I‘m 9a fa/a “a ,4 , loV L051: 2m ‘Extra work can be done here, but clearly indicate with problem you are solving. W I +7m; (KL/L39 wwér/ W)“ C6 gafh , W“ wad/Acme Wf/H—en +4" ”(’V" ”\ ' — m. ,. 0,1 z<[email protected])>[ 3‘ Wag/$36!) (1) fig: -: '3‘163” r0) 7"‘zgRL/{r09 “ W 4,: “W ...
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