Exam3Spring2002solution

Exam3Spring2002solution - ECE 3040 Microelectronic Circuits...

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Unformatted text preview: ECE 3040 Microelectronic Circuits Exam 3 April 18, 2002 Dr. W. Alan Doolittle Print your name clearly and largely: /M 4 i Q 3;! 3 Instructions: Read all the problems carefully and thoroughly before you begin working. You are allowed to use 1 new sheet of notes (1 page front and back), your note sheets from the previous exams as well as a calculator. There are 100 total points in this exam. Observe the point value of each problem and allocate your time accordingly. SHOW ALL WORK AND CIRCLE YOUR FINAL ANSWER WITH THE PROPER UNITS INDICATED. Write legibly. If I cannot read it, it will be considered a wrong answer. Do all work on the paper provided. Turn in all scratch paper, even if it did not lead to an answer. Report any and all ethics violations to the instructor. Good luck! Sign your name on ONE of the two following cases: I DID NOT observe any ethical violations during this exam: ' Ex I observed an ethical violation during this exam: First 25% Multiple Choice, True/False (Select the mos \'\l.). r-(3'-points) The gate current in the MOSF ET is a.) Highest under large positive gate bias b.) Highest under large negative gate bias oi Is determined by the change in fermi level position at the semiconductor-oxide interface t correct answer) Is always zero e. Is zero except in inversion 2.) (3 -points) A depletion mode PMOS transistor has a... a. ...p-type substrate. ...n-type substrate c. n-type channel when biased into cutoff (either depletion or accumulation) (1.) huge gate current. 3.) (4-points each, 12-points total) For the three transistor cross-sections I, II and III shown below, answer each of the three questions a-c: S D I g . . am“. a___; III. a.) For VGS>VDS>0 which cross-sectional View (I, II or III) is correct. :1 b.) For 0<VGS<VGg-Vt<VDs which cross-sectional View (I, II or III) is correct. I. c.) For VGS<0 and VDS>0 which cross-sectional View (I, II or III) is correct. . m: 4.) (4—points) Which energy band diagram corres a.) b.) / l ponds to a PMOS capacitor biased into accumulation. c.) d.) f-) 5.) (3 -points) For a Transresistance amplifier designed for maximum gain (circle all that apply): a. You should have a high input impedance? You should have a low input impedance? 0. You should have a high output impedance? You should have a low output impedance? ' The output is a voltage f. 17/6, 5:! §$frare Second 10% Short ; wer' //,/> 6.) (10 points) ‘ W ansistor at room temperature has an oxide thickness of 1000 angstroms (1 angstrom =lO'8 cm), determine the doping required to make the transistor begin conducting at 0.75 V. Use the following: Substrate relative Dielectric Constant, sr_semiconducto,=Ks=1 1.7 Oxide relative Dielectric Constant, sundae =Kox=3.9 Dielectric Constant of free space, so =8.854e-14 F/cm Substrate intrinsic concentration, ni=1e10 cm'3 Also recall that the total dielectric constant of the semiconductor is: as =Sr-serniconductoreo the total dielectric constant for the oxide is: 80X :Sr-oxidego r NA (M: 64‘ 3.7/{.me44) é;- T XM ’ \F/C: s [V4 mom-cm (9.035? A law) ‘ 3""1' 8-? 13/0": 0.7;: M: + nitrite-WW“ 2M 9) g: 3.1—r5’e-6’ F/WI (NJXIJ'Jfle—IQJF/m 0.75’= MI: 4 3e-5' (5473.2an N4 Problems (3rd 20%) 7.) You may assume that the Op-Amps are ideal. a.) (15 -points) Determine an equation relatin input voltages, Vinl, Vin2, Vin3. b.) (5 g the output voltage, Vout in terms of the three -points) Determine the input impedance seen by the source Vin3. Extra work can be done here, but clearly indicate with problem you are solving. é “For? I: L94 ’0": 27/7} =0 Man J». Jeri/t5 , 6R1 C L 5 A t Le+ A/‘y _ 4}" = fl . 5 /’ ‘2 MUMX (L', R I R ffkce ‘er v.'rmq19mm”j a§SUf€9 ’V‘=OJ m3: 3 a,» New! a: Arm + 449.: m3) —: 4»: k3 Pulling all the concepts together for a useful purpose: (4th portion) 8.) 145-20171“) Given the following circuit, what is the AC voltage gain, Vout/VinAc? You may assume all capacitors have infinite capacitance and are thus, AC shorts. Additionally consider the circuit to be operated at low frequencies where you can neglect all small signal capacitances. Grading will be based as such: 20 points for DC solution (VGS, VDS along with IDS for both transistors), 5 points for the conversion to the small signal model and 20 points for the small signal analysis. Hint: Assume and then verify that both transistors are saturated. If M2 is saturated, identify it’s functionality (i.e. what is M2 being used for) in the DC circuit. Do not panic! Performing this identification will make the AC solution easier but is not necessary to get the correct answer. VinAC R1 1meg Use the following parameters: For NMOS Depletion Transistors: [Vi R’9Kn’=20 uA/v2 VT=-1.0V 7t=o.o V'1 Length (L)=1 um Width (W)=100 um M1 For NMOS Enhancement Transistors: - 7Kn’=20 uA/v2 VT=1.0V x=o.o V'1 Length (L)=1 um Width (W)=100 um For PMOS Depletion Transistors: K,’=40 uA/Vz VT=+3.ov 7t=0.1 V'1 Length (L)=10 um Width (W)=10 um For PMOS Enhancement Transistors: K,’=40 uA/VZ vT=—3.0v h=0.1 V" Length (L)=10 urn Width (W)=‘10 urn Extra work can be done here, but clearly indicate with problem you are solving. éolwid'x.’ ‘ 06 Mi :7 NM“; E""‘WCM@M A=0,Kh=&0e-6,Vw‘l ’Vi "3 MIME (0801;? /€7‘2(0*\ >) :0 z k“ :_"we'62 WW?" /7 :fiway‘i W59»: 591%»{1’47‘60/ (Now V95> V‘s“ VT) >04 101/ > 0 —- ~l) , WV >| flggumfl#.0kw wam/ fw‘V Extra work can be done here, but clearly indicate with problem you are solving. AC éa/WVWWI «as. JIM? (/Curren+ $3ch ano/ 4,1ij V is an AC flaflen chew} éa‘i‘wftl‘ley/ -’*‘ V‘VTI‘ V65360A6‘T4‘un'b I05 = cansran+ ’V'in Bonus: (IO-points - Absolutely no partial credit) Determine an expression form He transfer voltage gain, VON [5y éué—‘flW’JWS’E‘aM/ .. R 13:. . R- s. NW1?" +21? |+ R‘)Mn '— WM“ Mflwx/ Va: M59 anviflflf' an + fhfu+ vfiufi' : _\ 4N“ 1+ RC5 3 3 RC5 — (RCs-H) \+R65 W 45:.” 2 RCs—l V/\/ 4’73“ RC§+\ ...
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This note was uploaded on 08/23/2011 for the course ECE 3040 taught by Professor Doolittle during the Spring '11 term at University of Florida.

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Exam3Spring2002solution - ECE 3040 Microelectronic Circuits...

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