ECE6450L7b-Lithography Steps for a CMOS Inverter

ECE6450L7b-Lithography Steps for a CMOS Inverter - ECE 6450...

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ECE 6450 - Dr. Alan Doolittle Georgia Tech Top View of a p-type wafer In Class Example of a “Simplified” Inverter Mask set: You probably will not want to print this file. Note: this example is meant to show effects of resolution and alignment only and is NOT the process used to produce most CMOS inverters
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ECE 6450 - Dr. Alan Doolittle Georgia Tech …open windows in oxide and add n-type well In Class Example of a “Simplified” Inverter Mask set: Probably will not want to print. Note: this example is meant to show effects of resolution and alignment only and is NOT the process used to produce most CMOS inverters
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ECE 6450 - Dr. Alan Doolittle Georgia Tech …open windows in oxide and add NMOS source/drain
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ECE 6450 - Dr. Alan Doolittle Georgia Tech …open windows in oxide and add PMOS source/drain
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ECE 6450 - Dr. Alan Doolittle Georgia Tech Define the gate oxide
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ECE 6450 - Dr. Alan Doolittle Georgia Tech Define the contact to the gate
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Unformatted text preview: ECE 6450 - Dr. Alan Doolittle Georgia Tech Define Gate interconnect In ECE 6450 - Dr. Alan Doolittle Georgia Tech Open contacts to the source and drain In ECE 6450 - Dr. Alan Doolittle Georgia Tech Add source and drain interconnects Vdd Out In Gnd ECE 6450 - Dr. Alan Doolittle Georgia Tech Vdd Out In Gnd Drain not connected to channel Source overlapped to far into channel Effect of improper Registration (Source/drain PMOS Mask layer) ECE 6450 - Dr. Alan Doolittle Georgia Tech Vdd Out In Gnd Effect of improper Registration (Source/drain PMOS Mask layer) Drain-channel width less than designed. Drain connected to substrate. Source-channel width more than designed ECE 6450 - Dr. Alan Doolittle Georgia Tech Add source and drain interconnects Vdd Out In Gnd Effect of improper Resolution (Gate contact window of NMOS Mask layer not resolved) NMOS Gate is left disconnected...
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This note was uploaded on 08/23/2011 for the course ECE 6450 taught by Professor Doolittle during the Fall '10 term at University of Florida.

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ECE6450L7b-Lithography Steps for a CMOS Inverter - ECE 6450...

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