fm - A VHDL Primer Jayaram Bhasker American Telephone and...

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A VHDL Primer Jayaram Bhasker American Telephone and Telegraph Company Bell Laboratories Division P T R Prentice Hall Englewood Cliffs, New Jersey 07632
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Dedicated to my parents, Nagamma and Appiah Jayaram ii
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Contents P r e f a c e v i CHAPTER 1. Introduction 1 1.1. What is VHDL? 1 1 . 2 . H i s t o r y 1 1.3. Capabilities 1 1.4. Hardware Abstraction 2 C H A P T E R 2 . A T u t o r i a l 4 2.1. Basic Terminology 4 2.2. Entity Declaration 5 2.3. Architecture Body 6 2.3.1. Structural Style of Modeling 6 2.3.2. Dataflow Style of Modeling 7 2.3.3. Behavioral Style of Modeling 8 2.3.4. Mixed Style of Modeling 9 2.4. Configuration Declaration 10 2.5. Package Declaration 11 2.6. Package Body 12 2.7. Model Analysis 12 2.8. Simulation 13 CHAPTER 3. Basic Language Elements 14 3.1. Identifiers 14 3 . 2 . D a t a O b j e c t s 1 4 3
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4 . 1 1 . E x i t S t a t e m e n t 3 5 4.12. Next Statement 36 4.13. Assertion Statement 37 4.14. More on Signal Assignment Statement 38 4.14.1. Inertial Delay Model 38 4.14.2. Transport Delay Model 38 4.14.3. Creating Signal Waveforms 39 4.14.4. Signal Drivers 39 4.15. Other Sequential Statements 42 4.16. Multiple Processes 42 CHAPTER 5. Dataflow Modeling 44 5.1. Concurrent Signal Assignment Statement 44 5.2. Concurrent versus Sequential Signal Assignment 45 5.3. Delta Delay Revisited 46 5.4. Multiple Drivers 47 5.5. Conditional Signal Assignment Statement 49 5.6. Selected Signal Assignment Statement 50 5.7. Block Statement 50 5.8. Concurrent Assertion Statement 53 CHAPTER 6. Structural Modeling 54 6 . 1 . A n E x a m p l e 5 4 6.2. Component Declaration 54 6.3. Component Instantiation 55 6.4. Other Examples 57 6.5. Resolving Signal Values 59 CHAPTER 7. Generics and Configurations 61 7 . 1 . G e n e r i c s 6 1
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CHAPTER 10. Advanced Features 84 10.1. Entity Statements
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fm - A VHDL Primer Jayaram Bhasker American Telephone and...

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