CpE317-syllubus-fall11

CpE317-syllubus-fall11 - Cp Eng 317 Fault Tolerant Digital...

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Fall Semester, 2011 Instructor Minsu Choi, Ph.D. Email: choim@ mst .edu Phone: 573-341-4524 Fax: 573-341-4532 Office: 134 Emerson Electric Co. Hall Office Hours: TTh 9:30 – 11AM or by appointment. Class/Laboratory Schedule TTh 8:00AM – 9:15AM in 239EECH. No laboratory in Cp Eng 317. Prerequisites CpE111 and CpE112 (Design of Combinational and Sequential Logic Circuits, Computer Experience). Text Main Text: Fault-Tolerant Systems , Koren and Krishna, Morgan Kaufman Publishers, 1 st edition. Recommended Supplemental Text: Self-Checking and Fault-Tolerant Digital Design , P.K. Lala, Morgan Kaufman Publishers, 1 st Edition. Course Website http://blackboard.mst.edu – log in and select CpE317. Catalog Description Design and analysis of fault-tolerant digital systems. Fault models, hardware redundancy, information redundancy, evaluation techniques, system design procedures. Course Objectives To introduce fault-tolerant digital systems including: Concepts, Design Techniques, Mathematical Models, Computer Aided Evaluation Tools, and Examples. Topics Covered 1. Fundamentals of Reliability. 2. Coding Techniques. 3. Self-Checking Combinational Logic Design. 4. Self-Checking Checkers. 5. Self-Checking Sequential Circuit Design. 6. Fault-Tolerant Design. 7. Network Reliability. Grading
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This note was uploaded on 08/29/2011 for the course ECE 265 taught by Professor Kosbar during the Fall '09 term at Missouri S&T.

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CpE317-syllubus-fall11 - Cp Eng 317 Fault Tolerant Digital...

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