Unformatted text preview: output resistance, and the gain. Things to think about: The supply voltage and the current set an upper limit on the value of R D . That and the gain requirement set a lower limit on the value of g m (why doesn’t ro enter into it?). That limit on g m , combined with the current, sets a limit on the value of V DSAT . The source impedance sets a lower limit on the input impedance of the amplifier. That sets a lower limit on the parallel combination of R1 and R2. The frequency range and the gate bias resistors will set an upper limit on the impedance of the capacitor. That limit and the frequency range of interest will set a lower limit on the size of the capacitor. Problem 3 : Simulate your amplifier in SPICE: find the operating point and compare to your hand calculations. Make a Bode plot – does it work over the range from 20 to 20k?...
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This note was uploaded on 08/30/2011 for the course EE 105 taught by Professor Kingliu during the Fall '07 term at Berkeley.
 Fall '07
 KingLiu

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