12-Input-Output - II

12-Input-Output - II - Input Output II Presenter Tathagata...

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Input / Output - II Presenter Tathagata Bhattacharjee
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Tathagata Bhattacharjee 2 Input Output Techniques Programmed I/O Interrupt driven I/O Direct Memory Access (DMA)
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Tathagata Bhattacharjee 3 Programmed I/O CPU has direct control over I/O Sensing status Read/write commands Transferring data CPU waits for I/O module to complete operation Wastes CPU time
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Tathagata Bhattacharjee 4 Explanation The processor executes a program that gives it direct control of the I/O operation including sensing device status, sending a read/write command and transferring the data When the processor issues a command to the I/O module, it must wait until the I/O operation is complete If processor is faster than I/O module, this is wastage of processor time
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Tathagata Bhattacharjee 5 Programmed I/O - steps CPU requests I/O operation I/O module performs operation I/O module sets status bits CPU checks status bits periodically I/O module does not inform CPU directly I/O module does not interrupt CPU CPU may wait or come back later
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Tathagata Bhattacharjee 6 Programmed I/O to read in a block of data from a peripheral device(e.g. Tape Drive) Next Instruction Issue read command to I/O module CPU -> I/O Read status of I/O module Check Status Read word from I/O module Write word into memory Done? I/O -> CPU Error Condition I/O -> CPU CPU -> Memory Not ready Yes No Read
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Tathagata Bhattacharjee 7 I/O Commands CPU issues address Identifies module (and device if >1 per module) CPU issues command Control - telling module what to do e.g. spin up disk Test - check status e.g. power? Error? Read/Write Module transfers data via buffer from/to device
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Tathagata Bhattacharjee 8 Addressing I/O Devices Under programmed I/O data transfer is very like memory access (CPU viewpoint) Each device given unique identifier or address CPU commands contain identifier or address
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Tathagata Bhattacharjee 9 When the processor, main memory and I/O share a common bus, two modes of addressing are possible: Memory mapped I/O Isolated I/O
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Tathagata Bhattacharjee 10 I/O Mapping Memory mapped I/O Single address space for memory locations and I/O
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This note was uploaded on 07/15/2011 for the course ECO 2023 taught by Professor Mr.raza during the Summer '10 term at FAU.

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12-Input-Output - II - Input Output II Presenter Tathagata...

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