Suppl_01 - ECE 442 SolidState Devices & Circuits CMOS...

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1 Jose E. Schutt Aine ECE 442–Spring 2007 ECE 442 Solid CMOS Process Jose E. Schutt-Aine University of Illinois jschutt@emlab.uiuc.edu
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2 Jose E. Schutt Aine ECE 442–Spring 2007 Basic Fabrication Process Chart Clean Rooms – Semiconductor processing is performed in ultraclean facilities called clean rooms – Sophisticated filtration to remove airbone particulates – Workers must wear special uniforms to minimize introduction of contaminants
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3 Jose E. Schutt Aine ECE 442–Spring 2007 Clean Room Facility
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4 Jose E. Schutt Aine ECE 442–Spring 2007 CMOS Process Steps Wafer Preparation – Crystal orientation, doping, polishing – Typical wafers are 400 µ m to 600 µ m thick Oxidation – Silicon reacts with oxygen to form silicon dioxide SiO 2 – Use high temperature (>1000 o C) to speed up process –S iO 2 is effective mask against impurities Diffusion
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Suppl_01 - ECE 442 SolidState Devices & Circuits CMOS...

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