Background•Program must be brought (from disk) into memory and placed within a process for it to be run•Fetch -> Decode -> Execute•Fetch next instruction from memory •Decode the new instruction – If necessary: fetch operands (data) from memory •Execute the instruction – If necessary: save results (new data) to memory•Main memory and registers are only storage CPU can access directly•There are no machine instructions taking disk addresses as arguments•Memory unit only sees a stream of:•addresses + read requests, or •address + data and write requests•Register access is done in one CPU clock (or less); very fast memories•Main memory can take many cycles, causing a stall•Cachesits between main memory and CPU registers; solution to stall issue•Protection of memory required to ensure correct operation; hardware-level soln.
Protection•Need to censure that a process can access only access those addresses in it address space.•We can provide this protection by using a pair of baseandlimitregistersdefine the logical address space of a processSmallest legal physical memory addressRange of valid memory addresses
Hardware Address Protection•CPU must check every memory access generated in user mode to be sure it is between base and limit for that user•the instructions to loading the base and limit registers are privileged
Address Binding•Programs on disk, ready to be brought into memory to execute form an input queue•Without support, must be loaded into address 0000•Inconvenient to have first user process physical address always at 0000 •How can it not be?•Addresses represented in different ways at different stages of a programʼs life•Source code addresses usually symbolic•Compiled code addresses bind to relocatable addresses•i.e. “14 bytes from beginning of this module”•Linker or loader will bind relocatable addresses to absolute addresses•i.e. 74014•Each binding maps one address space to another
Binding of Instructions and Data to Memory•Address binding of instructions and data to memory addresses can happen at three different stages•Compile time: If memory location known a priori, absolute codecan be generated; must recompile code if starting location changes•Load time: Must generate relocatable codeif memory location is not known at compile time•Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another•Need hardware support for address maps (e.g., base and limit registers)
Logical vs. Physical Address Space•The concept of a logical address space that is bound to a separate physical address spaceis central to proper memory management•Logical address– generated by the CPU; also referred to as