HW_EC - A & B = k . 3. Design a 5:32 footed domino...

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EE3193/EL5473 Intro. to VLSI Extra Credit Homework Assignment Due December 11 by 5:00PM 1. (Problem 10.7 in text) Sketch the PG network for a modified 16-bit Slansky adder with fanout of [8, 1, 1, 1] rather than [8, 4, 2, 1]. Use buffers to prevent the less- significant bits from loading the critical path. Hint: You may need to sacrifice symmetry. 2. (Problem 10.12 in text) Sketch a design for a comparator computing
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Unformatted text preview: A & B = k . 3. Design a 5:32 footed domino decoder using domino AND gates. Indicate transistor sizes and estimate the delay of the decoder assuming it drives word lines each with a capacitance of C L = 20C. 4. (Problem 11.11 in text) Sketch a schematic for an 8-word x 2-bit NAND ROM that serves as a lookup table to implement a full adder....
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This note was uploaded on 09/09/2011 for the course EE 3193 taught by Professor Halenlee during the Spring '10 term at NYU Poly.

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