HW2 - 3. (Problem 2.14 in text) Peter Pitfall is offering...

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EE3193/EL5473 Intro. to VLSI Homework Assignment 2 Due beginning of class September 29 1. Consider an nMOS transistor in a 0.25 m process with W/L = 8/2 º (i.e., 1 /0.25 m) . In this process, assume the gate oxide thickness is 50 ¯ and the mobility of electrons is 350 cm 2 /Vs. The threshold voltage is 0.7 V. Plot I ds for V gs = 0, 1, 1.5, 2, and 2.5 V. 2. (Problem 2.8 in text) Sometimes the substrate is connected to a voltage called the substrate bias to alter the threshold of the transistors. If the threshold of an nMOS transistor is to be raised, should a positive or negative substrate bias be used? Why or why not?
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Unformatted text preview: 3. (Problem 2.14 in text) Peter Pitfall is offering to license to you his patented noninverting buffer circuit shown below. Graphically derive the transfer characteristics for this buffer. Assume n = p = and V tn = | V tp | = V t . Why is it a bad circuit idea? 4. Find the worst case Elmore parasitic delay for an n-input NAND gate. 5. Suppose V DD = 2.5V and V t = 0.6V. Determine V out of an NMOS pass transistor where the gate voltage ( V G ) is driven by V DD and (a) V in = 0V; (b) V in = 1V; (c) V in = 2V; and (d) V in = 2.5V. Explain assumptions made and reasoning....
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This note was uploaded on 09/09/2011 for the course EE 3193 taught by Professor Halenlee during the Spring '10 term at NYU Poly.

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