LabSession2_1 - where the minimum width is 600 nm 2 Draw...

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EE3193/EL5473 Intro. to VLSI Lab Session 2 Before starting the lab itself, complete Tutorial 2 and you may want the TA to check off that it has been completed successfully. ** Tutorials are found at: 1. Create a 3-input NOR gate schematic in the EL5473 library and name the new cell view NOR3. ± NOTE : Make sure to size this gate based on the unit inverter created in tutorial 2
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Unformatted text preview: where the minimum width is 600 nm. 2. Draw the layout of the 3-input NOR gate using the techniques you learned in tutorial 2. 3. When you are finished, run DRC and make sure there are no errors. Select and copy the text in the icfb window verifying DRC ran with no errors. The schematic, layout, and DRC results are your deliverables....
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This note was uploaded on 09/09/2011 for the course EE 3193 taught by Professor Halenlee during the Spring '10 term at NYU Poly.

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