LabSession4

LabSession4 - this modified latch as DLATCH2. 3. Verify...

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EE3193/EL5473 Intro. to VLSI Lab Session 4 Before starting the lab itself, complete Tutorial 4 . ** Tutorials are found at: http://eeweb.poly.edu/labs/nanovlsi/tutorials/CustomICTut.htm 1. Run simulations verifying the DLATCH schematic and extracted views created in Tutorial 4. 2. Modify your DLATCH so that 2 separate non-overlapping clocks can be used. These modifications should be to both the schematic and layout views. Also, save
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Unformatted text preview: this modified latch as DLATCH2. 3. Verify DLATCH2 through DRC and LVS and then simulate both the schematic and extracted views of DLATCH2. Deliverables include the simulations for DLATCH (from Tutorial 4), proof of successful DRC and LVS for DLATCH2, and simulation results for DLATCH2....
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This note was uploaded on 09/09/2011 for the course EE 3193 taught by Professor Halenlee during the Spring '10 term at NYU Poly.

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