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Unformatted text preview: Design alternatives for barrel shifters Matthew R. Pillmeier Rushmore Processor 2 Unisys Corporation Blue Bell, PA 19424 Michael J. Schulte and E. George Walters III Computer Architecture and Arithmetic Laboratory Computer Science and Engineering Department Lehigh University Bethlehem, PA 18015, USA ABSTRACT Barrel shifters are often utilized by embedded digital signal processors and general-purpose processors to ma- nipulate data. This paper examines design alternatives for barrel shifters that perform the following functions: shift right logical, shift right arithmetic, rotate right, shift left logical, shift left arithmetic, and rotate left. Four different barrel shifter designs are presented and compared in terms of area and delay for a variety of operand sizes. This paper also examines techniques for detecting results that overflow and results of zero in parallel with the shift or rotate operation. Several Java programs are developed to generate structural VHDL models for each of the barrel shifters. Synthesis results show that data-reversal barrel shifters have less area and mask- based data-reversal barrel shifters have less delay than other designs. Mask-based data-reversal barrel shifters are especially attractive when overflow and zero detection is also required, since the detection is performed in parallel with the shift or rotate operation. Keywords: barrel shifters, rotators, masks, data-reversal, overflow detection, zero flag, computer arithmetic. 1. INTRODUCTION Shifting and rotating data is required in several applications including arithmetic operations, variable-length coding, and bit-indexing. Consequently, barrel shifters, which are capable of shifting or rotating data in a single cycle, are commonly found in both digital signal processors and general-purpose processors. Several patents [1 10] and research articles  have been written on efficient designs and implementations for barrel shifters. In , several 32-bit barrel shifters are compared in terms of delay, power, and power-delay product. This paper examines design alternatives for barrel shifters that perform the following operations: shift right logical, shift right arithmetic, rotate right, shift left logical, shift left arithmetic, and rotate left. These designs are optimized to share hardware for different operations. Techniques are also presented for detecting results that overflow and results of zero in parallel with the shift or rotate operation. Section 2 describes the basic shift and rotate operations and gives examples of each operation. Section 3 presents designs for several types of barrel shifters. Section 4 gives area and delay estimates for each type of barrel shifter as the operand size varies. Section 5 presents conclusions. Further details on the designs presented in this paper are given in ....
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