04286852

04286852 - Designof a Radix- SaveAdder M Fonseca Pelotas...

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Unformatted text preview: Designof a Radix-2mHybridArrayMultiplierUsingCarry SaveAdder M. Fonseca ElectricalEngineeringDepartment UniversidadeCat6licadePelotas Pelotas, Brazil412- 96010-000 [email protected] S.Bampi MicroelectronicsGroup UniversidadeFederaldoRioGrandedoSul Porto Alegre, Brazil 15064- 91591-970 [email protected] ABSTRACT Inthiswork, we presentadesignofaradix-2m Hybrid ar- raymultiplierusingCarrySaveAdder (CSA)circuitinthe partialproduct linesinordertospeed-upthecarrypropa- gationalongthearray. The Hybrid multiplierarchitecture waspreviouslypresentedintheliteratureusingRippleCarry Adders(RCA)inthepartialproductlines.Inourworkwe present improvements inthis multiplier by using a faster CSA alongthecircuit.Theresultswepresentshowthatthe Hybrid architecturewith CSA compares favorablyin area, performanceandpowerwiththearchitecturewithRCA. In thisworkwealsocomparetheHybridmultiplieragainstthe ModifiedBoothmultiplier,bothusingCSA.The resultswe haveobtainedshowthatafterusingCSA inthepartialprod- uct lines,theHybridmultiplierissignificantly more efficient thantheModifiedBoothcircuit.Powersavingscloseto25% areachievable. We comparethemultipliersintermsofarea, delayandpowerbyusingAlteraQuartusIItool. Synthesis and simulation ofthemultipliersare performedforAltera Stratixdevice. Categories and SubjectDescriptors B.2 [Arithmeticand Logic Structures]: DesignStyles GeneralTerms Design Keywords Hybridmultiplier,CarrySaveAdder,Low power Permissiontomake digitalorhardcopiesofallorpartofthisworkfor personalorclassroomuseisgrantedwithoutfeeprovidedthatcopiesare notmadeordistributedforprofitorcommercialadvantageandthatcopies bearthisnoticeandthefullcitationonthefirstpage.Tocopyotherwise,to republish,topostonserversortoredistributetolists,requires priorspecific permissionand/orafee. SBCCI'05,September4-7,2005,Florian6polis,Brazil. Copyright2005ACM 1-59593-174-0/05/0009 ...$5.00. E. daCosta ElectricalEngineeringDepartment UniversidadeCat6licadePelotas Pelotas,Brazil 412- 96010-000 [email protected] J.Monteiro AlgosGroup IST/INESC-ID Lisbon, Portugal 1000-029 [email protected] 1. INTRODUCTION One ofthemajor speedenhancement techniquesusedin modern digitalcircuitsistheabilityto add numbers with minimal carry propagation [13]. One ofmain time saving techniquesusedinthefastestdesignsistheuseofcarrysave adderstocombinethepartialproductsintoafinalanswer. Carry save adder isone ofthe most widely used schemes forfastarithmetic inindustry [12]. Multipliers and DSP accumulatorstendtousecarrysaveaddersintheirstructure sotheysaveallthecarriesfromalltheaddstothelaststage. This isan important issue,sinceDSP applicationsrequire highcomputationalspeedand,atthesametime,sufferfrom stringentpowerdissipationconstraints[14] Inthisworkweusecarrysaveadderinthepartialproduct linesofaHybrid multiplierinordertospeed-upthecarry propagation alongthe array. Inthismultiplier, itisused anew approachtohandleoperandsin2's-complementwith exactlythesame structureasan arraymultiplier,with the sameunsignedbitproductsforallthebitsexceptthosethat...
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04286852 - Designof a Radix- SaveAdder M Fonseca Pelotas...

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