EE331DP1_PWM_DCMotorSpeedControl - EE-331 Devices and...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
EE-331 Devices and Circuits 1 Winter 2011 Laboratory Design Project Prof. R. B. Darling PWM DC Motor Speed Control DESIGN PROJECT DESCRIPTION: The objective of this design project is to develop and prototype a high efficiency pulse width modulation (PWM) speed control for a small DC motor. A block diagram of the overall system is shown below: PWM modulator motor driver DC motor GND VDD VMTR V ctrl oscillator Figure 1. Block diagram of the PWM DC motor speed control. V ramp (t) V ctrl 0 V cmax time PWM output ON OFF T t H t L Figure 2. Ramp generation of PWM digital output.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Background: Controlling a higher power load with a lower power control circuit is an extremely common electrical engineering task. Some type of switching device, such as a transistor, is required to control the current flow through the load, but if direct modulation is performed, this creates a rather inefficient design with the control device, the transistor, often using more electrical power than the load itself. A much more power efficient control method is to rapidly switch the control device on and off at a frequency which is high enough that the load effectively sees only the average over many cycles. Since the transistor is either full on or full off, either its current is zero, or its voltage is small, and therefore the power dissipation of the control device can be significantly reduced. This is a common operating principle of many power electronics circuits. The most common method for providing this type of switch-mode power control is through pulse width modulation or PWM. In PWM, the drive to the control device is a train of pulses whose frequency is kept constant, but whose pulse width is adjusted. As shown in the lower part of Fig. 2, T is held constant, but the high-time t H is varied to adjust the effective voltage that is given to the control device and also the current through the load. The duty cycle is the fraction of a cycle that the control device is turned on, D.C. = t H /T, usually expressed as a percent. If the voltage present in the ON state is V S , then the effective output from the PWM is a voltage equal to V S times the duty cycle: V out = V S t H /T. The great advantage of this type of control is that it provides a highly linear transfer function, since pulse widths can be controlled quite precisely in most electronic circuits. As can be seen, the scaling factor between output voltage and the pulse width is V S /T, which can be made a constant for the circuit. The heart of a PWM system is the modulator which controls the PWM pulse width as a function of some external control voltage input, V ctrl . As the input control voltage is varied over a range of 0 to V cmax , it is desired to change the output pulse width from 0 to T, corresponding to duty cycles of 0% to 100%. In practice, it is difficult to go fully from 0% to 100%, but most PWM systems come within a few percent of either extreme limit, still giving a large range over which the control is linear and predictable, for example, 2% to 98%. A periodic ramped voltage waveform is usually the most convenient and simplest means to make
Background image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

Page1 / 6

EE331DP1_PWM_DCMotorSpeedControl - EE-331 Devices and...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online