# ch05 - Chapter 5 Exercise Solutions E5.1 No E5.2 The upper...

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Unformatted text preview: Chapter 5 Exercise Solutions E5.1 No. E5.2 The upper four bits of the INIT register should be set to 0100 and the lower four bits should be set to 1100. Therefore, the value %01001100 should be written into the INIT register. E5.3 (a) Using the ×1 organization, 32 chips are required to construct a 32-bit wide memory system. With 32 256K×1 DRAM chips, a 1 MB memory system is created. Therefore, 32 such DRAM chips are required. (b) Using the ×4 organization, 8 chips are required to construct a 32-bit wide memory system. Eight 256K×4 DRAM chips are needed to construct a 1MB memory. (c) Using the ×8 organization, 4 chips are required to construct a 32-bit wide memory system. With 4 64K×8 DRAM chips, a 256KB memory system is constructed. Therefore, 16 such DRAM chips are required. (d)Using the ×16 organization, 2 chips are required to construct a 32-bit wide memory system. With 2 128K×16 DRAM chips, a 256 KB memory system is constructed. Therefore, 8 such DRAM chips are required. E5.4 Use the partial decoding method shown in Example 4.6, the address signals A 13 A 12 A 11 are not used in addressing. The binary equivalent of the address \$5080 is %0101,0000,1000,0000. Since the address signals A 13 A 12 A 11 can be any value, the following addresses will select the same memory location: %0100,0000,1000.0000: \$4080 %0100,1000,1000,0000: \$4880 %0101,0000,1000,0000: \$5080 %0101,1000,1000,0000: \$5880...
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ch05 - Chapter 5 Exercise Solutions E5.1 No E5.2 The upper...

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