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Unformatted text preview: Chapter 6 Exercise Solutions E6.1 Interrupt service routine. E6.2 The main advantage is that the CPU can still perform some other operations when waiting for I/O to be completed. E6.3 To handle interrupts, we need to (1) write the interrupt service routine (2) set up interrupt vectors in the interrupt vector table (3) enable the interrupt E6.4 We must clear the I bit of the CCR register within the interrupt service routine. E6.5 In some applications, the user may want the request from a particular interrupt source to be serviced as soon as possible. Raising it to the highest priority will make that happen. E6.6 The address for the IRQ vector table entry starts at $FFF2. The following directives will initialize the vector of IRQ properly: ORG $FFF2 FDB $E200 E6.7 The last instruction in most interrupt service routine is RTI. This instruction will pop the stack to the CPU registers in the following order: CCR, B, A, X, Y, PC Since the contents of the PC will be replaced by the address of the interrupted instruction, the...
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- Spring '11
- X86, Interrupt, Interrupt Service Routine, CCR