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Final1 - BEL/4767 Embedded Systems FALL 2008 FINAL EXAM(A...

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Unformatted text preview: BEL/4767 Embedded Systems _ FALL 2008 FINAL EXAM (A) Closed Book [No Notes (1 pt) NAME (3.3 points each for 99 points) 1. What kind of addressing is used with the following instruction: BCS 3E1? a. Immediate b. Direct c. Extended d. Relative 2. Given the following code what does the program do? ORG $3000 START LDS #SOOFF LDX #START PSHX LDS #$080 PSHA PSHB J SR TEST PULA ' PULB ED JMP ED TEST LDS #$00FD RTS Swaps the A and B accumulators Executes the PULA instruction afier executing the subroutine TEST Executes the LDS #$00FF instruction afier executing the subroutine TEST Swaps the X and SP registers. 999‘?” 3. If the crystal frequency of the 68HC11 is 4 MHz, the E clock period is: 0.125 microseconds 0.500 microseconds 0.750 microseconds 1.000 microseconds 9-.“ P‘?’ 4. How many memory chips are required to build a 2 MB, 32 bit wide memory system using 512K X 8 SRAM chips? a. 32 i b. 16. c. 8 d. 4 5. What does the instruction sz do? a. Copies the X register value -1 to the Stack pointer register. b. Copies the X register value +1 to the Stack pointer register. 0. Copies the Stack Pointer register value to the X register. d. Copies the X register value to the Stack Pointer. 6. Compute the new values of accumulator B and the C flag after executing the instruction ROLB. The original value in B is $BE and the C flag is I. a. 01111101andCflagisl. b. 11011111andCflagis1. c llOlllllandCflagisO. d 01111101 andCflagisO. 7. Find the values of the condition flags N, Z, V and C after executing CMPA #5. Given: {A] = 2, Nfi, Z=1, V20 and C=l. (HINT: the compare instruction affects the N, Z, V, and C flags. Calculate the binary arithmetic operation manually to determine which flag is set). 8. Ifthe E clock is nmning at ZZMHZ and the given the following code, how long does it take to run the program from the label START to the label DONE? (pick the closest answer) DATA FDB $A000 START LDX DATA (5 clock cycles) LP DEX t (3 clock cycles) CPX #$0000 (4 clock cycles) BNE LP (3 clock cycles) ‘ DONE A total time of 40,960 microseconds A total time of 204,802 microseconds A total time of 409,605 microseconds A total time of 686,728 microseconds FL.“ 9"!” 9. The SW1 instruction uses what techniques to determine the address to jump to when an S‘WI occurs: Vector address at $FFF5 and $FFF6. Relative address to the PC at $FFF 6 and $FFF7. Vector address at $FFF6 and $FF F7. Relative address to the PC at $FFF5 and $FFF6. P‘PP‘P’ 10. What does the RTI instruction do? a. Only pulls the return address off the stack and places it in the PC. b. Pulls all the registers (except the SP) off the stack and places the return address in the PC. , b. Pushes all the registers on the stack (except the SP) and places the return address in the PC. . b. Pulls the X and Y registers off the stack and places the return address in the PC. 11. Data is valid from the 68HC11 to an external device on the data bus when: a. R/(W not) =0 and E = 0. b. R/(W not) =1 and E = 1. c. R/(W not) =1 and E = 0. d. R/(W not) =0 and E = l. 12. Address Lines A0 to A7 are valid from the 68HC11 to an external device on Port C when: E= l. E=O. R/(W not) =1 and E = 0. R/(W not) =0 and E = 0. 9953'!” 13. What kind of memories use a very simple capacitive charge storage circuit consisting of only one transistor and one capacitor to store a single bit? a. Static memories. b. Slow memories. c. Non-volatile memories. _ d. Dynamic memories. 14. Which of the following best describes memory mapped 1/0? a. 1/0 is treated the same as any other memory location and there is no difference between memory and I/O. . b. Microprocessors have separate instructions for performing I/O operations. c. I/O devices have their own address space that is different from the main memory address space. (1. Special addressing modes are needed for all register operations. 15. What is the minimum number of 74LS 138 (3 to 8) decoders that will be needed to address two external 8 KB by 8 bit SRAM chips, two 8 KB by 8 bits EPROM chips, one 8 KB by 8 bits flash memory chip and eight by 8 bit I/O devices (partial address decoding)? Each of these devices can be placed within any 4K boundary within the 64KB memory space. OG‘DJ 1 2 8 1 CL 6 16. Which of the 6850 serial communication (UART) registers are for reading? a. Receive data and status b. Receive data and configuration. c. Transmit data and configuration. (1. Transmit. data and status. 17. To save external pins on the 68HC11, which statement is true? a. The analog to digital converter is share with port A. b. The analog to digital converter is share with port C. c. The upper and the lower eight bits of the address bus are multiplexed together. (1. The data busand the lower eight bits of the address bus are multiplexed together. ' 18- How many 8—bit Input and Output ports are available on the 6821' PIA (Hint: notes 13)- page: .tswtoh- 19. The time required to transmit 2000 characters of 8 bits using RS 232C with a format of 8 data bits, 1 start bit, lstop bit and no parity with a transmit Speed of 4,800 baud is: a. 1.04 see b. 2.08 sec .0. 4.16 sec. (1. 8.33 sec. 20. The voltage level used for R8232C is: +/- V (V is between 3 and 15 volts). V (negative only; V is between 0 and -15 volts). V (positive only V is between 0 and 5 volts). +/— V (V is between 0 and 10 volts). P‘F’P‘P’ 21. A buffer overflow error occurs in RSZ32C when: data is sent to the transmit buffer slower than it can being sent serially. an odd number of 1’s were transmitted but an even number of 1 ’s were received. data was not read from the receive buffer at a fast enough rate. the number of bits received is different than transmitted. 5199's» 22. For R3232, the maximum allowable difference in baud rates between the receiver and transmitter can be: a. +/'— 2%. b. +/— 3%. c. +/— 4%. d. +/- 5%. 29. To fully address decode all 2K blocks in the 68HC1 1, what set of address lines will be required by the address decoder? a. A15, A14 a. A15, A14, A13 b. A15, A14, A13, A12 d- A15, A14, A13, A12, A10 30. Given the following address decoder, where will it be located within the 68HC11 memory map (CE not goes to zero)? A1 5 A14 A13 7 CE A12 E a. $2000 — 02m, E b. $4000 - $411139, E c. $6000 - $6FFF, E 0 d. $8000 — $87FF, E = 1 0 1 H II II ...
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